line_rate_pl_in_tx.list

开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测

+version:  10/31/2000
+switches:  
+uca_version: 3.6.354
+uca_date: Jan 20 2004 14:03:45
+current_date: Tue Mar 02 12:03:20 2004

.cpu_version 0x00000002 1 255

.%num_contexts 8

.%local_mem0_mode rel
.%local_mem1_mode rel

.%init_nn_mode neighbor

.%legacy xfer on

:addfreelist# 55
:comp_tbuf_tx_sequnce# 114
:cont_comp_tbuf_tx_sequnce# 126
:init# 6
:init_common# 0
:init_rbuf# 19
:read_tx_sequence_loop# 117
:refcnt_calc_done# 143
:tbuf_full_check_done# 129
:wait_for_assignment# 94
:wait_for_next_ctx_sig# 91
:wait_for_sram_sig# 104
:wait_tx_seq_read_done# 118
:wake_up_next_thread_after_init# 92
*-- no_destination 0
*$l0000!sram_data sram_rel 00 0 both 1 0x0
*$l0000!cframes_sent0 sram_rel 01 0 both 1 0x0
;*l0000!temp!!2 gpr_b_rel 04
;*l0000!temp!!3 gpr_b_rel 04
;*l0000!temp!!4 gpr_b_rel 04
;*l0000!temp!!5 gpr_b_rel 04
;*l0000!temp!!6 gpr_a_rel 09
;*l0000!temp!!7 gpr_b_rel 04
*l0000!temp gpr_b_rel 04
*l0000!byte_count gpr_b_rel 05
*l0000!ring_num gpr_b_rel 06
*$l0000!txcontrolword0 sram_rel 00 0 both 2 0x5A
*$l0000!txcontrolword1 sram_rel 01 0 both 1 0x5A
*@l0000!tbuf_element gpr_b_abs 32
*l0000!cur_tbuf_elem gpr_b_rel 07
*l0000!buf_addr gpr_a_rel 00
*l0000!buf_offset gpr_a_rel 01
*l0000!tbuf_base gpr_a_rel 02
;*l0000!cur_tbuf_addr!!2 gpr_b_rel 08
;*l0000!cur_tbuf_addr!!3 gpr_b_rel 08
;*l0000!cur_tbuf_addr!!4 gpr_a_rel 07
*l0000!cur_tbuf_addr gpr_a_rel 07
*l0000!tx_sequence_addr gpr_b_rel 00
*l0000!sram_channel_number gpr_b_rel 01
*@l0000!sramdescbase gpr_b_abs 02
*@l0000!drampacketbase gpr_a_abs 03
*l0000!t0 gpr_a_rel 04
*@l0000!total_tx gpr_b_abs 12
*@l0000!tx_sequence_value gpr_b_abs 22
*$l0000!prepend_data0 sram_rel 00 0 both 2 0x46
*$l0000!prepend_data1 sram_rel 01 0 both 1 0x46
*l0001!rxcontroldata gpr_b_rel 03
*$l0001!rxcontroldata sram_rel 00 0 both 1 0x0
*l0001!msfaddress gpr_b_rel 05
*l0002!temp_val gpr_b_rel 03
*l0002!temp_reg gpr_b_rel 05
*l0003!rxupcontroldata gpr_b_rel 07
*$l0003!rxupcontroldata sram_rel 00 0 both 1 0x0
;*l0003!msfaddress!!2 gpr_b_rel 08
;*l0003!msfaddress!!3 gpr_b_rel 08
;*l0003!msfaddress!!4 gpr_b_rel 08
*l0003!msfaddress gpr_b_rel 08
;*l0004!timeout_val!!2 gpr_b_rel 09
*l0004!timeout_val gpr_b_rel 09
*l0005!cellcount gpr_b_rel 09
*l0005!freelist gpr_b_rel 0A
*$l0005!s0 sram_rel 00 0 both 3 0x2F
*$l0005!s1 sram_rel 01 0 both 2 0x2F
*$l0005!s2 sram_rel 02 0 both 1 0x2F
;*l0005!tmp!!2 gpr_b_rel 0B
;*l0005!tmp!!3 gpr_b_rel 0B
;*l0005!tmp!!4 gpr_b_rel 0B
*l0005!tmp gpr_a_rel 0B
*$l0005!sr0 sram_rel 00 0 both 4 0x23
*$l0005!sr1 sram_rel 01 0 both 3 0x23
*$l0005!sr2 sram_rel 02 0 both 2 0x23
*$l0005!sr3 sram_rel 03 0 both 1 0x23
*l0005!sram_desc_base gpr_b_rel 07
*$l0006!scratch_base sram_rel 00 0 both 1 0x0
*$l0006!scratch_head sram_rel 01 0 both 1 0x0
*$l0006!scratch_tail sram_rel 02 0 both 1 0x0
*l0007!msfaddress gpr_b_rel 09
*l0007!txcontroldata gpr_b_rel 0A
*$l0007!txcontroldata sram_rel 00 0 both 1 0x0
*$l0008!rxcontroldata sram_rel 00 0 both 1 0x0
*l0008!msfaddress gpr_b_rel 0A
*$l0009!scratch_data sram_rel 00 0 both 1 0x0
;*l0010!result!!2 gpr_b_rel 0C
;*l0010!result!!3 gpr_b_rel 0C
;*l0010!result!!4 gpr_b_rel 0C
*l0010!result gpr_b_rel 0C
*l0010!next_avial_tbuf gpr_a_rel 05
;*l0010!tmp_tbuf!!2 gpr_a_rel 06
*l0010!tmp_tbuf gpr_a_rel 06
*l0010!total_tbuf_num_in_tx_seq gpr_b_rel 03
;*l0011!refcnt!!2 gpr_b_rel 0D
;*l0011!refcnt!!3 gpr_b_rel 0D
*l0011!refcnt gpr_b_rel 0D
;*l0011!pkt_buf_addr!!2 gpr_a_rel 08
*l0011!pkt_buf_addr gpr_b_rel 0E
;*l0012!msfaddress!!2 gpr_b_rel 0F
*l0012!msfaddress gpr_a_rel 0A
*l0013!cellcount gpr_b_rel 0E
*l0013!enqueue_data gpr_b_rel 0F
*l0006!scratch_sig3 signal 03 0
*l0006!scratch_sig2 signal 02 0
*l0006!scratch_sig1 signal 01 0
*l0005!qa_init signal 01 0
*l0005!qa_init!!2 signal 01 0
*l0000!tx_seq_read_sig signal 01 0
*l0000!next_ctx_sig signal 0E 0
*l0000!msf_sig signal 01 0
*l0000!msf_sig!!11 signal 01 0
*l0000!msf_sig!!10 signal 01 0
*l0000!msf_sig!!9 signal 01 0
*l0000!msf_sig!!8 signal 01 0
*l0000!msf_sig!!7 signal 01 0
*l0000!msf_sig!!6 signal 01 0
*l0000!msf_sig!!5 signal 01 0
*l0000!msf_sig!!4 signal 01 0
*l0000!msf_sig!!3 signal 01 0
*l0000!msf_sig!!2 signal 01 0
*l0000!scratch_sig signal 01 0
*l0000!sram_sig signal 01 0
*l0000!dram_sig signal 02 0
.%type R
.%type SI
.%scope global
.%var l0013!enqueue_data 0 R
.%liverange 0 B15 158:161
.%liverange 0 ~B15 94:149
.%var l0013!cellcount 0 R
.%liverange 0 B14 159:161
.%liverange 0 ~B14 94:134
.%var l0012!msfaddress 0 R
.%liverange 0 A10 149:149
.%liverange 0 B15 150:157
.%var l0011!pkt_buf_addr 0 R
.%liverange 0 B14 135:135
.%liverange 0 A8 136:161
.%liverange 0 ~A8 94:134
.%var l0011!refcnt 0 R
.%liverange 0 B13 140:161
.%liverange 0 ~B13 94:139
.%var l0010!total_tbuf_num_in_tx_seq 0 R
.%liverange 0 B3 113:161
.%liverange 0 ~B3 94:112
.%var l0010!tmp_tbuf 0 R
.%liverange 0 A6 112:161
.%liverange 0 ~A6 94:111
.%var l0010!next_avial_tbuf 0 R
.%liverange 0 A5 107:161
.%liverange 0 ~A5 94:106
.%var l0010!result 0 R
.%liverange 0 B12 109:161
.%liverange 0 ~B12 94:108
.%var $l0009!scratch_data 0 R
.%liverange 0 $W0 162:162
.%liverange 0 $R0 95:98
.%liverange 0 ~$R0 94:94
.%var l0008!msfaddress 0 R
.%liverange 0 B10 75:90
.%liverange 0 ~B10 92:161
.%var $l0008!rxcontroldata 0 R
.%liverange 0 $W0 77:90
.%liverange 0 ~$W0 92:130
.%liverange 0 $R0 76:90
.%liverange 0 ~$R0 92:94
.%var $l0007!txcontroldata 0 R
.%liverange 0 $W0 71:76
.%liverange 0 $R0 162:162
.%var l0007!txcontroldata 0 R
.%liverange 0 B10 69:74
.%var l0007!msfaddress 0 R
.%liverange 0 B9 68:90
.%liverange 0 ~B9 92:161
.%var $l0006!scratch_tail 0 R
.%liverange 0 $W2 63:90
.%liverange 0 ~$W2 92:161
.%liverange 0 $R2 162:162
.%var $l0006!scratch_head 0 R
.%liverange 0 $W1 62:90
.%liverange 0 ~$W1 92:131
.%liverange 0 $R1 162:162
.%var $l0006!scratch_base 0 R
.%liverange 0 $W0 61:70
.%liverange 0 $R0 162:162
.%var l0005!sram_desc_base 0 R
.%liverange 0 B7 41:90
.%liverange 0 ~B7 92:99
.%var $l0005!sr3 0 R
.%liverange 0 $W3 162:162
.%liverange 0 $R3 162:162
.%var $l0005!sr2 0 R
.%liverange 0 $W2 162:162
.%liverange 0 $R2 162:162
.%var $l0005!sr1 0 R
.%liverange 0 $W1 162:162
.%liverange 0 $R1 162:162
.%var $l0005!sr0 0 R
.%liverange 0 $W0 162:162
.%liverange 0 $R0 51:75
.%var l0005!tmp 0 R
.%liverange 0 A11 43:43
.%liverange 0 B11 44:90
.%liverange 0 ~B11 92:161
.%var $l0005!s2 0 R
.%liverange 0 $W2 47:62
.%liverange 0 $R2 162:162
.%var $l0005!s1 0 R
.%liverange 0 $W1 46:61
.%liverange 0 $R1 162:162
.%var $l0005!s0 0 R
.%liverange 0 $W0 45:60
.%liverange 0 $R0 162:162
.%var l0005!freelist 0 R
.%liverange 0 B10 53:68
.%var l0005!cellcount 0 R
.%liverange 0 B9 55:67
.%var l0004!timeout_val 0 R
.%liverange 0 B9 35:54
.%var l0003!msfaddress 0 R
.%liverange 0 B8 27:90
.%liverange 0 ~B8 92:136
.%var $l0003!rxupcontroldata 0 R
.%liverange 0 $W0 26:44
.%liverange 0 $R0 162:162
.%var l0003!rxupcontroldata 0 R
.%liverange 0 B7 25:40
.%var l0002!temp_reg 0 R
.%liverange 0 B5 20:90
.%liverange 0 ~B5 19:19 92:129
.%var l0002!temp_val 0 R
.%liverange 0 B3 19:90
.%liverange 0 ~B3 92:112
.%var l0001!msfaddress 0 R
.%liverange 0 B5 17:18
.%liverange 0 ~B5 19:19
.%var $l0001!rxcontroldata 0 R
.%liverange 0 $W0 16:25
.%liverange 0 $R0 162:162