📄 line_rate_pl_in_rx.list
字号:
l000_end#:
.%line 94 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed[l0000!ring, 0]
.18 8020008600 common_code
.%line 96 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0000!sram_channel_number, --, b, 1, <<30]
.19 9A80208200 common_code
.%line 97 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0000!t0, l0000!sram_channel_number, or, 0, <<24]
.20 F002000F00 common_code
.%line 99 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed[l0000!rbuf_base, 0x2000 ]
.21 F000003B44 common_code
.%line 100 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed[l0000!rbuf_elem_done, 0x0044]
.22 F001000300 common_code
.%line 102 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.begin
.%line 103 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.reg l0002!rxthreadlist
.%line 104 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed[l0002!rxthreadlist, 4096]
.23 9B90080208 common_code
.%line 105 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0002!rxthreadlist, l0002!rxthreadlist, or, l0000!cur_me, <<7]
.24 9BC0080209 common_code
.%line 106 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0002!rxthreadlist, l0002!rxthreadlist, or, l0000!cur_ctx, <<4]
.25 BA40D00300 common_code
.%line 107 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[l0000!rxconfigdata, l0002!rxthreadlist, or , 0]
.26 8100203600 common_code
.%line 108 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0000!rxconfigdata, --, b, l0000!rxconfigdata, <<16]
.27 E000000001 common_code
.%line 109 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.end
.%line 111 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
ctx_arb[voluntary]
.28 D809400011 common_code
.%line 112 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 37
br!=ctx[0, init_done#]
.29 F0000C0084 common_code
.%line 118 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
init_thread0_only#:
.%line 119 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed[@l0000!sramdescbase, 0]
.30 F4400C8084 common_code
.%line 120 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed_w1[@l0000!sramdescbase, 32]
.31 F0000C0094 common_code
.%line 122 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed[@l0000!drampacketbase, 0]
.32 F4401C0094 common_code
.%line 123 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed_w1[@l0000!drampacketbase, 256]
.33 F002000700 common_code
.%line 129 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.begin
.%line 130 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.reg l0003!duplex_addr $l0003!duplex
.%line 131 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
immed[l0003!duplex_addr, 0x2000]
.34 1010100420 common_code
.%line 132 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
scratch[read, $l0003!duplex, 0, l0003!duplex_addr, 1], ctx_swap[l0000!scratch_sig]
.35 B008660400 common_code
.%line 133 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[@l0000!half_duplex, --, b, $l0003!duplex]
.36 D80903C213 common_code
.%line 134 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.end
.%line 136 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 36
wait_for_inter_me_sig#:
.%line 137 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 36
br_!signal[l0000!inter_me_sig, wait_for_inter_me_sig#]
.37 D809C00010 common_code
.%line 139 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
init_done#:
.%line 144 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.set_sig l0000!same_me_sig
.%line 145 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 39
br=ctx[0, startreceive#]
.38 E000004000 common_code
.%line 146 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
ctx_arb[l0000!same_me_sig]
.39 FC10AFC3F0 common_code
.%line 148 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
startreceive#:
.%line 149 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
receivenextpacket#:
.%line 150 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.set_sig l0000!rx_sig l0000!same_me_sig
.%line 151 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
local_csr_wr[same_me_signal, 240]
.40 3D00041302 common_code
.%line 152 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
msf[fast_wr, --, l0000!rxconfigdata, l0000!rx_thd_freelist]
.41 E000004002 common_code
.%line 153 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
ctx_arb[l0000!rx_sig, l0000!same_me_sig]
.42 9490F20121 common_code
.%line 161 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
rsw#:
.%line 162 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0000!null, 0x1, and, $l0000!transferreg00, >>9]
.43 D815800101 common_code
.%line 163 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 86
bne[null#]
.44 FC10AFC3F0 common_code
.%line 167 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.set_sig l0000!same_me_sig
.%line 168 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
local_csr_wr[same_me_signal, 240]
.45 0B10100B20 common_code
.%line 170 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
sram[dequeue, $l0000!sr0, 0, l0000!t0], sig_done[l0000!sram_sig]
.46 9180520100 common_code
.%line 172 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0000!elem, --, b, $l0000!transferreg00, >>24]
.47 85003601FF common_code
.%line 175 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0000!bytecnt, 0xff, and, $l0000!transferreg00, >>16]
.48 B40096030F common_code
.%line 176 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[l0000!rx_port_num, 0xf, and, $l0000!transferreg00]
.49 9030A80103 common_code
.%line 179 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.begin
.%line 180 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.reg l0004!refcnt l0004!ind_ref_data l0004!dest_port_num $l0004!sram_data
.%line 185 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0004!refcnt, --, b, l0000!bytecnt, >>3]
.50 A4300C1C03 common_code
.%line 186 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[--, l0000!bytecnt, and, 0x7]
.51 D80D400101 common_code
.%line 187 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 53
bne[set_refcnt_overwrite_bit#]
.52 BAC0A02B01 common_code
.%line 188 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[l0004!refcnt, l0004!refcnt, -, 1]
.53 8BC0582A21 common_code
.%line 189 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
set_refcnt_overwrite_bit#:
.%line 190 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0004!refcnt, l0004!refcnt, or, 1, <<4]
.54 8190601600 common_code
.%line 192 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.local l0005!rbufoffset
.%line 193 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0005!rbufoffset, --, b, l0000!elem, <<7]
.55 B0C0700C06 common_code
.%line 194 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[l0004!ind_ref_data, l0000!rbuf_base, +, l0005!rbufoffset]
.56 AAF0021B01 common_code
.%line 195 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.endlocal
.%line 198 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.if (@half_duplex == 1)
.%line 198 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[--,@l0000!half_duplex,-,1]
.57 D80FC00101 common_code
.%line 198 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 63
bne[l001_01#]
.58 A800702701 common_code
.%line 199 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.local l0006!bit0 l0006!bit1
.%line 200 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[l0006!bit0, 1, and~, l0000!rx_port_num]
.59 9010C02500 common_code
.%line 201 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0006!bit1, --, b, l0000!rx_port_num, >>1]
.60 9BF0B03207 common_code
.%line 202 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0004!dest_port_num, l0006!bit0, or, l0006!bit1, <<1]
.61 8BC8182E03 common_code
.%line 203 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[$l0004!sram_data, l0004!dest_port_num, or, l0000!bytecnt, <<4]
.62 D810000018 common_code
.%line 204 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.endlocal
.%line 205 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.else
.%line 205 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 64
br[l001_end#]
.63 8BC8182603 common_code
.%line 205 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
l001_01#:
.%line 206 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[$l0004!sram_data, l0000!rx_port_num, or, l0000!bytecnt, <<4]
.64 E000104002 common_code
.%line 207 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.endif
.%line 207 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 1
l001_end#:
.%line 210 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 1
ctx_arb[l0000!sram_sig, l0000!same_me_sig], defer[1]
.65 9BB0701E30 common_code
.%line 211 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 0
alu_shf[l0004!ind_ref_data, 16, or, l0004!ind_ref_data, <<5]
.66 FC10AFC3F0 common_code
.%line 213 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.set_sig l0000!same_me_sig
.%line 214 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
local_csr_wr[same_me_signal, 240]
.67 91E0120600 common_code
.%line 216 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.local l0007!pkt_buff_addr l0007!rel l0007!freebuffer l0007!bdptr l0007!ring_data
.%line 220 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0007!freebuffer, --, b, $l0000!sr0, <<2]
.68 BAC0800484 common_code
.%line 221 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[l0007!rel, l0007!freebuffer, -, @l0000!sramdescbase]
.69 91B0802200 common_code
.%line 222 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0007!rel, --, b, l0007!rel, <<5]
.70 B080002094 common_code
.%line 223 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu[l0007!pkt_buff_addr, @l0000!drampacketbase, +, l0007!rel]
.71 9AB0781E05 common_code
.%line 229 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 1
alu_shf[l0004!ind_ref_data, l0004!ind_ref_data, or, l0004!refcnt, <<21]
.72 6A2E000320 common_code
.%line 230 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 0
dram[rbuf_rd, --, 0, l0007!pkt_buff_addr, 8], indirect_ref, sig_done[l0000!dram_sig]
.73 0110100700 common_code
.%line 236 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
sram[write, $l0004!sram_data, l0000!sram_channel_number, l0007!freebuffer, 1], sig_done[l0000!sram_sig]
.74 E000104002 common_code
.%line 238 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 1
ctx_arb[l0000!sram_sig, l0000!same_me_sig], defer[1]
.75 A018000400 common_code
.%line 239 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 0
alu[$l0000!ring_data, --, b, l0007!freebuffer]
.76 D814008212 common_code
.%line 241 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
wait_for_dram_sig#:
.%line 242 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.set_sig l0000!same_me_sig
.%line 243 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 80
br_signal[l0000!dram_sig, rbuf_to_dram_done#]
.77 FC10AFC3F0 common_code
.%line 244 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
local_csr_wr[same_me_signal, 240]
.78 E000004000 common_code
.%line 245 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
ctx_arb[l0000!same_me_sig]
.79 D813000018 common_code
.%line 246 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 76
br[wait_for_dram_sig#]
.80 FC10AFC3F0 common_code
.%line 247 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.endlocal
.%line 248 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.end
.%line 250 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
rbuf_to_dram_done#:
.%line 251 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.set_sig l0000!same_me_sig
.%line 252 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
local_csr_wr[same_me_signal, 240]
.81 D814408214 common_code
.%line 258 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 81
check_ring_full#:
.%line 259 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 81
br_inp_state[scr_ring0_full, check_ring_full#]
.82 1A10008301 common_code
.%line 260 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
scratch[put, $l0000!ring_data, l0000!ring, 0, 1], sig_done[l0000!scratch_sig]
.83 9100501600 common_code
.%line 266 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.begin
.%line 267 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.reg l0008!rbuf_elem_done_data
.%line 268 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
alu_shf[l0008!rbuf_elem_done_data, --, b, l0000!elem, <<16]
.84 3D000417A4 common_code
.%line 269 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
msf[fast_wr, --, 0x0044, l0008!rbuf_elem_done_data]
.85 E000004002 common_code
.%line 270 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
.end
.%line 272 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0
ctx_arb[l0000!scratch_sig, l0000!same_me_sig]
.86 D809C00018 common_code
.%line 274 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 39
null#:
.%line 275 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 39
next_packet#:
.%line 276 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_in_rx.uc" 1 0 39
br[receivenextpacket#]
+ucode_end
SEGMENT ADDRESS RANGE STATISTICS
Segment: common_code_seg address range: 0-86;
includes pages:
common_code
PAGE ADDRESS RANGE STATISTICS
Page: common_code address range: 0-86
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -