📄 line_rate_pl_eg_tx.list
字号:
br[me_specific_init_done#]
.16 F0000C0300 common_code
.%line 99 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
; The following uwords are unreachable and have been commented out
; nop
; End commenting out unreachable code
.%line 99 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
nop ; inserted to restore spacing between jump targets
.17 91E0008A00 common_code
.%line 98 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
port2#:
.%line 99 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0000!ring_num, --, b, 2, <<2]
.18 F000001720 common_code
.%line 100 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[l0000!base_element_for_port, 32]
.19 D806000018 common_code
.%line 101 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 24
br[me_specific_init_done#]
.20 F0000C0300 common_code
.%line 105 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
; The following uwords are unreachable and have been commented out
; nop
; End commenting out unreachable code
.%line 105 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
nop ; inserted to restore spacing between jump targets
.21 91E0008E00 common_code
.%line 104 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
port3#:
.%line 105 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0000!ring_num, --, b, 3, <<2]
.22 F000001730 common_code
.%line 106 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[l0000!base_element_for_port, 48]
.23 D806000018 common_code
.%line 107 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 24
br[me_specific_init_done#]
.24 F002000700 common_code
.%line 110 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
me_specific_init_done#:
.%line 111 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[l0000!tbuf_base, 0x2000]
.25 8020208600 common_code
.%line 113 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0000!sram_channel_number, --, b, 1, <<30]
.26 9A80208202 common_code
.%line 114 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0000!t0, l0000!sram_channel_number, or, 0, <<24]
.27 E000000001 common_code
.%line 116 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
ctx_arb[voluntary]
.28 D809800011 common_code
.%line 117 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 38
br!=ctx[0, wait_for_next_ctx_sig#]
.29 F0000C0081 common_code
.%line 119 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
init#:
.%line 120 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[@l0000!tbuf_element, 0]
.30 F0000C0091 common_code
.%line 122 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[@l0000!sramdescbase, 0]
.31 F4400C8091 common_code
.%line 123 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed_w1[@l0000!sramdescbase, 32]
.32 F0000C00A1 common_code
.%line 125 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[@l0000!drampacketbase, 0]
.33 F4401C00A1 common_code
.%line 126 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed_w1[@l0000!drampacketbase, 256]
.34 F00FFFFCB1 common_code
.%line 128 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[@l0000!mask_qa, 65535]
.35 F4400FFCB1 common_code
.%line 129 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed_w1[@l0000!mask_qa, 255]
.36 E000008000 common_code
.%line 131 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.set_sig l0000!inter_me_sig
.%line 132 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
ctx_arb[l0000!inter_me_sig]
.37 D809C00018 common_code
.%line 133 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 39
br[wake_up_next_thread_after_init#]
.38 E000004000 common_code
.%line 136 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
wait_for_next_ctx_sig#:
.%line 137 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.set_sig l0000!next_ctx_sig
.%line 138 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
ctx_arb[l0000!next_ctx_sig]
.39 D80A41C010 common_code
.%line 140 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 41
wake_up_next_thread_after_init#:
.%line 141 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 41
br=ctx[7, wait_for_assignment#]
.40 FC10AFC3F0 common_code
.%line 142 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
local_csr_wr[same_me_signal, 240]
.41 1910000020 common_code
.%line 144 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.begin
.%line 145 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.reg $l0003!scratch_data
.%line 147 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
wait_for_assignment#:
.%line 148 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
scratch[get, $l0003!scratch_data, 0, l0000!ring_num, 1], ctx_swap[l0000!scratch_sig]
.42 AAB00C0180 common_code
.%line 149 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[--, $l0003!scratch_data, -, 0]
.43 D80A400100 common_code
.%line 150 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 41
beq[wait_for_assignment#]
.44 B000360000 common_code
.%line 151 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[l0000!buf_addr, --, b, $l0003!scratch_data]
.45 0010000F02 common_code
.%line 152 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.end
.%line 154 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.begin
.%line 155 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.reg $l0004!sram_data
.%line 156 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
sram[read, $l0004!sram_data, l0000!sram_channel_number, l0000!buf_addr, 1], sig_done[l0000!sram_sig]
.46 A0C0401481 common_code
.%line 157 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[l0000!cur_tbuf_elem, l0000!base_element_for_port, +, @l0000!tbuf_element]
.47 A0881C0481 common_code
.%line 158 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[@l0000!tbuf_element, @l0000!tbuf_element, +, 1]
.48 AAF00C4081 common_code
.%line 159 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[--, 16, -, @l0000!tbuf_element]
.49 D80CC00101 common_code
.%line 160 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 51
bne[wait_for_sram_sig#]
.50 A0081C0000 common_code
.%line 161 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[@l0000!tbuf_element, --, b, 0]
.51 E000100002 common_code
.%line 163 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 1
wait_for_sram_sig#:
.%line 164 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 1
ctx_arb[l0000!sram_sig], defer[1]
.52 BAC0400C91 common_code
.%line 165 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 0
alu[l0000!buf_offset, l0000!buf_addr, -, @l0000!sramdescbase]
.53 A000360000 common_code
.%line 166 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[l0000!byte_count, --, b, $l0004!sram_data]
.54 91B0601200 common_code
.%line 167 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.end
.%line 173 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.begin
.%line 174 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.reg l0005!refcnt l0005!pkt_buf_addr l0005!cur_tbuf_addr
.%line 176 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0005!pkt_buf_addr, --, b, l0000!buf_offset, <<5]
.55 A0C00018A1 common_code
.%line 177 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[l0005!pkt_buf_addr, l0005!pkt_buf_addr, +, @l0000!drampacketbase]
.56 9B90780604 common_code
.%line 179 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0005!cur_tbuf_addr, l0000!tbuf_base, or, l0000!cur_tbuf_elem, <<7]
.57 91B0701E00 common_code
.%line 180 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0005!cur_tbuf_addr, --, b, l0005!cur_tbuf_addr, <<5]
.58 9BC0781E21 common_code
.%line 181 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0005!cur_tbuf_addr, l0005!cur_tbuf_addr, or, 1, <<4]
.59 8030580103 common_code
.%line 183 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0005!refcnt, --, b, l0000!byte_count, >>3]
.60 A4300C1C03 common_code
.%line 184 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[--, l0000!byte_count, and, 0x7]
.61 D80FC00101 common_code
.%line 185 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 63
bne[refcnt_calc_done#]
.62 AA805C0405 common_code
.%line 186 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu[l0005!refcnt, l0005!refcnt, -, 1]
.63 80B0580205 common_code
.%line 187 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
refcnt_calc_done#:
.%line 188 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0005!refcnt, --, b, l0005!refcnt, <<21]
.64 8A70508605 common_code
.%line 189 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0005!refcnt, l0005!refcnt, or, 1, <<25]
.65 AA70001C05 common_code
.%line 191 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 1
alu[--, l0005!cur_tbuf_addr, or, l0005!refcnt]
.66 6B2E008300 common_code
.%line 192 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 0
dram[tbuf_wr, --, l0005!pkt_buf_addr, 0, 8], indirect_ref, sig_done[l0000!dram_sig]
.67 E00000000C common_code
.%line 193 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
ctx_arb[l0000!dram_sig, l0000!dram_sig+1]
.68 F001802300 common_code
.%line 194 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.end
.%line 200 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.begin
.%line 201 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.reg l0006!msfaddress l0006!temp
.%line 203 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[l0006!msfaddress, 0x1800]
.69 8BD0682204 common_code
.%line 204 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0006!msfaddress, l0006!msfaddress, or, l0000!cur_tbuf_elem, <<3]
.70 F000302700 common_code
.%line 206 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[l0006!temp, 768]
.71 8A88082603 common_code
.%line 207 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[$l0000!txcontrolword0, l0006!temp, or, l0000!byte_count, <<24]
.72 F0000C0181 common_code
.%line 209 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[$l0000!txcontrolword1, 0]
.73 3D12008006 common_code
.%line 211 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
msf[write, $l0000!txcontrolword0, l0006!msfaddress, 0, 2], ctx_swap[l0000!msf_sig]
.74 8020700D00 common_code
.%line 212 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.end
.%line 218 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.begin
.%line 219 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.reg l0007!cellcount l0007!enqueue_data
.%line 221 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
alu_shf[l0007!enqueue_data, --, b, l0000!buf_addr, >>2]
.75 F400002B1C common_code
.%line 222 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
immed[l0007!cellcount, 0x1c, <<16]
.76 AA70002B00 common_code
.%line 224 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 1
alu[--, l0007!cellcount, or, 0]
.77 4C00000B07 common_code
.%line 225 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 0
sram[enqueue, --, l0007!enqueue_data, l0000!t0], indirect_ref
.78 D80A400018 common_code
.%line 226 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0
.end
.%line 229 "C:\phase9rel\diag\test_suites\microcode\line_rate_pl\line_rate_pl_eg_tx.uc" 1 0 41
br[wait_for_assignment#]
+ucode_end
SEGMENT ADDRESS RANGE STATISTICS
Segment: common_code_seg address range: 0-78;
includes pages:
common_code
PAGE ADDRESS RANGE STATISTICS
Page: common_code address range: 0-78
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