line_rate_bw_eg_tx.list

开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测

+version:  10/31/2000
+switches:  
+uca_version: 3.6.354
+uca_date: Jan 20 2004 14:03:45
+current_date: Mon Mar 22 11:08:06 2004

.cpu_version 0x00000002 1 255

.%num_contexts 8

.%local_mem0_mode rel
.%local_mem1_mode rel

.%init_nn_mode neighbor

.%legacy xfer on

:cont_comp_tbuf_tx_sequnce# 64
:init# 31
:init_common# 9
:l000_01# 7
:l000_end# 7
:me_specific_init_done# 26
:port0# 11
:port1# 15
:port2# 19
:port3# 23
:read_tx_sequence_loop# 57
:refcnt_calc_done# 76
:wait_for_assignment# 43
:wait_for_next_ctx_sig# 40
:wait_for_sram_sig# 54
:wake_up_next_thread_after_init# 41
*-- no_destination 0
*l0000!cur_me gpr_a_rel 09
*l0000!cur_ctx gpr_b_rel 0E
*l0000!ring_num gpr_a_rel 00
*l0000!tbuf_base gpr_b_rel 00
*@l0000!tbuf_element gpr_a_abs 01
*l0000!sram_channel_number gpr_a_rel 02
*l0000!t0 gpr_b_rel 01
*@l0000!sramdescbase gpr_a_abs 11
*@l0000!drampacketbase gpr_a_abs 21
*@l0000!mask_qa gpr_a_abs 31
*l0000!buf_addr gpr_b_rel 02
*l0000!buf_offset gpr_b_rel 03
*l0000!byte_count gpr_a_rel 03
*l0000!base_element_for_port gpr_b_rel 04
*l0000!cur_tbuf_elem gpr_a_rel 04
*l0000!tbuf_count gpr_a_rel 05
;*l0000!txsequenceaddr!!2 gpr_b_rel 05
*l0000!txsequenceaddr gpr_b_rel 05
*$l0000!txcontrolword0 sram_rel 00 0 both 2 0x1B
*$l0000!txcontrolword1 sram_rel 01 0 both 1 0x1B
*l0001!temp gpr_b_rel 0F
*l0002!jump_offset gpr_b_rel 00
*$l0003!scratch_data sram_rel 00 0 both 1 0x0
*$l0004!sram_data sram_rel 00 0 both 1 0x0
;*l0005!result!!2 gpr_b_rel 06
*l0005!result gpr_a_rel 06
*l0005!tmp_val gpr_b_rel 07
*l0005!tmp_tbuf gpr_b_rel 08
*$l0005!txsequencedata sram_rel 00 0 both 1 0x0
;*l0006!refcnt!!2 gpr_a_rel 07
;*l0006!refcnt!!3 gpr_a_rel 07
*l0006!refcnt gpr_a_rel 07
;*l0006!pkt_buf_addr!!2 gpr_b_rel 09
*l0006!pkt_buf_addr gpr_b_rel 09
;*l0006!cur_tbuf_addr!!2 gpr_b_rel 0A
;*l0006!cur_tbuf_addr!!3 gpr_b_rel 0A
*l0006!cur_tbuf_addr gpr_b_rel 0A
;*l0007!msfaddress!!2 gpr_b_rel 0B
*l0007!msfaddress gpr_b_rel 0B
*l0007!temp gpr_b_rel 0C
*l0008!cellcount gpr_b_rel 0D
*l0008!enqueue_data gpr_a_rel 08
*l0000!inter_me_sig signal 0F 0
*l0000!next_ctx_sig signal 0E 0
*l0000!msf_sig signal 01 0
*l0000!msf_sig!!2 signal 01 0
*l0000!dram_sig signal 02 0
*l0000!sram_sig signal 01 0
*l0000!scratch_sig signal 01 0
.%type R
.%type SI
.%scope global
.%var l0008!enqueue_data 0 R
.%liverange 0 A8 88:91
.%liverange 0 ~A8 43:87
.%var l0008!cellcount 0 R
.%liverange 0 B13 89:91
.%liverange 0 ~B13 43:88
.%var l0007!temp 0 R
.%liverange 0 B12 84:91
.%liverange 0 ~B12 43:83
.%var l0007!msfaddress 0 R
.%liverange 0 B11 82:91
.%liverange 0 ~B11 43:81
.%var l0006!cur_tbuf_addr 0 R
.%liverange 0 B10 70:91
.%liverange 0 ~B10 43:69
.%var l0006!pkt_buf_addr 0 R
.%liverange 0 B9 68:91
.%liverange 0 ~B9 43:67
.%var l0006!refcnt 0 R
.%liverange 0 A7 73:91
.%liverange 0 ~A7 43:72
.%var $l0005!txsequencedata 0 R
.%liverange 0 $W0 92:92
.%liverange 0 $R0 58:91
.%liverange 0 ~$R0 43:43 57:57
.%var l0005!tmp_tbuf 0 R
.%liverange 0 B8 63:91
.%liverange 0 ~B8 43:62
.%var l0005!tmp_val 0 R
.%liverange 0 B7 60:91
.%liverange 0 ~B7 43:59
.%var l0005!result 0 R
.%liverange 0 A6 59:64
.%liverange 0 B6 65:91
.%liverange 0 ~B6 43:58
.%var $l0004!sram_data 0 R
.%liverange 0 $W0 92:92
.%liverange 0 $R0 48:56
.%liverange 0 ~$R0 57:57
.%var $l0003!scratch_data 0 R
.%liverange 0 $W0 92:92
.%liverange 0 $R0 44:47
.%liverange 0 ~$R0 43:43
.%var l0002!jump_offset 0 R
.%liverange 0 B0 10:13 15:17 19:21 23:26
.%var l0001!temp 0 R
.%liverange 0 B15 2:13 15:17 19:21 23:91
.%var $l0000!txcontrolword1 0 R
.%liverange 0 $W1 86:91
.%liverange 0 ~$W1 43:85
.%liverange 0 $R1 92:92
.%var $l0000!txcontrolword0 0 R
.%liverange 0 $W0 85:91
.%liverange 0 ~$W0 43:84
.%liverange 0 $R0 92:92
.%var l0000!txsequenceaddr 0 R
.%liverange 0 B5 8:13 15:17 19:21 23:91
.%var l0000!tbuf_count 0 R
.%liverange 0 A5 50:91
.%liverange 0 ~A5 43:49
.%var l0000!cur_tbuf_elem 0 R
.%liverange 0 A4 49:91
.%liverange 0 ~A4 43:48
.%var l0000!base_element_for_port 0 R
.%liverange 0 B4 13:13 17:17 21:21 25:91
.%var l0000!byte_count 0 R
.%liverange 0 A3 57:91
.%liverange 0 ~A3 43:56
.%var l0000!buf_offset 0 R
.%liverange 0 B3 56:91
.%liverange 0 ~B3 43:55
.%var l0000!buf_addr 0 R
.%liverange 0 B2 47:91
.%liverange 0 ~B2 43:46
.%var @l0000!mask_qa 0 R
.%liverange 0 @A49 0:91
.%var @l0000!drampacketbase 0 R
.%liverange 0 @A33 0:91
.%var @l0000!sramdescbase 0 R
.%liverange 0 @A17 0:91
.%var l0000!t0 0 R
.%liverange 0 B1 29:91
.%var l0000!sram_channel_number 0 R
.%liverange 0 A2 28:91
.%var @l0000!tbuf_element 0 R
.%liverange 0 @A1 0:91
.%var l0000!tbuf_base 0 R
.%liverange 0 B0 27:91
.%var l0000!ring_num 0 R
.%liverange 0 A0 12:13 16:17 20:21 24:91
.%var l0000!cur_ctx 0 R
.%liverange 0 B14 4:13 15:17 19:21 23:91
.%var l0000!cur_me 0 R
.%liverange 0 A9 3:13 15:17 19:21 23:91
.%var l0000!inter_me_sig 1 R
.%liverange 0 G15 38:39
.%var l0000!next_ctx_sig 1 R
.%liverange 0 G14 40:41
.%var l0000!msf_sig 1 R
.%liverange 0 G1 58:58 87:87
.%var l0000!dram_sig 1 R
.%liverange 0 D2 80:81
.%var l0000!sram_sig 1 R
.%liverange 0 G1 48:56
.%var l0000!scratch_sig 1 R
.%liverange 0 G1 44:44
.%scope end
.0 FC044C0000 common_code
	.import_var __chip_id i$__chip_id __chip_revision i$__chip_revision __uengine_id i$__uengine_id
	.%line 46 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg l0000!cur_me l0000!cur_ctx
	.%line 47 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg l0000!ring_num
	.%line 48 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg l0000!tbuf_base @l0000!tbuf_element
	.%line 49 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg l0000!sram_channel_number l0000!t0
	.%line 50 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg @l0000!sramdescbase @l0000!drampacketbase @l0000!mask_qa
	.%line 51 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg l0000!buf_addr l0000!buf_offset l0000!byte_count
	.%line 52 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg l0000!base_element_for_port l0000!cur_tbuf_elem
	.%line 53 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg l0000!tbuf_count @l0000!tx_count l0000!txsequenceaddr
	.%line 54 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.reg $l0000!txcontrolword0 $l0000!txcontrolword1
	.%line 56 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.sig l0000!scratch_sig l0000!sram_sig l0000!dram_sig l0000!msf_sig
	.%line 57 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.sig l0000!next_ctx_sig l0000!inter_me_sig
	.%line 59 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.xfer_order $l0000!txcontrolword0 $l0000!txcontrolword1
	.%line 61 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.addr l0000!next_ctx_sig 14
	.%line 62 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.addr l0000!inter_me_sig 15
	.%line 68 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.begin
	.%line 69 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		.reg l0001!temp
	.%line 70 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 1
		local_csr_rd[active_ctx_sts]
.1 F000003F00 common_code
	.%line 71 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 0
		immed[l0001!temp, 0]
.2 8430903D3F common_code
	.%line 72 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		alu_shf[l0000!cur_me, 0x1f, and, l0001!temp, >>3]
.3 B400E03F07 common_code
	.%line 73 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		alu[l0000!cur_ctx, 0x7, and, l0001!temp]
.4 AAB00C1009 common_code
	.%line 74 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.end
	.%line 76 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		.if (cur_me > 4)
	.%line 76 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		alu[--,l0000!cur_me,-,4]
.5 D801C0010A common_code
	.%line 76 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0 7
		ble[l000_01#]
.6 E000010000 common_code
	.%line 77 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
			ctx_arb[kill], any
.7 F000001760 common_code
	.%line 78 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		.endif
	.%line 78 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		l000_01#: 
		l000_end#: 
	.%line 80 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		immed[l0000!txsequenceaddr, 0x0060]
.8 9BE0581609 common_code
	.%line 81 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		alu_shf[l0000!txsequenceaddr, l0000!txsequenceaddr, or, l0000!cur_me, <<2]
.9 91E0080209 common_code
	.%line 84 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.local l0002!jump_offset
	.%line 83 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	init_common#:
	.%line 85 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		alu_shf[l0002!jump_offset, --, b, l0000!cur_me, <<2]
.10 E80000030B common_code
	.%line 86 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0 11 B0
		jump[l0002!jump_offset, port0#], targets[port0#, port1#, port2#, port3#]
.11 81E0008200 common_code
	.%line 87 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	.endlocal
	.%line 89 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	port0#:
	.%line 90 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		alu_shf[l0000!ring_num, --, b, 0, <<2]
.12 F000001300 common_code
	.%line 91 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		immed[l0000!base_element_for_port, 0]
.13 D806800018 common_code
	.%line 92 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0 26
		br[me_specific_init_done#]
.14 F0000C0300 common_code
	.%line 96 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	; The following uwords are unreachable and have been commented out
	; 	nop
	; End commenting out unreachable code
	.%line 96 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	nop ; inserted to restore spacing between jump targets
.15 81E0008600 common_code
	.%line 95 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	port1#:
	.%line 96 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		alu_shf[l0000!ring_num, --, b, 1, <<2]
.16 F000001310 common_code
	.%line 97 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
		immed[l0000!base_element_for_port, 16]
.17 D806800018 common_code
	.%line 98 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0 26
		br[me_specific_init_done#]
.18 F0000C0300 common_code
	.%line 102 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bw\line_rate_bw_eg_tx.uc" 1 0
	; The following uwords are unreachable and have been commented out