line_rate_bd_eg_rx.list

开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测

+version:  10/31/2000
+switches:  
+uca_version: 3.0.411
+uca_date: Sep  9 2002 00:25:20
+current_date: Mon Dec 02 18:51:07 2002

.cpu_version 0x00000002 0 15

.%num_contexts 8

.%local_mem0_mode rel
.%local_mem1_mode rel

.%init_nn_mode neighbor

:3# 79
:addfreelist# 34
:cont1# 90
:context_enable_csr_config# 13
:fill# 98
:here# 0
:init_common# 63
:init_rbuf# 40
:init_value# 7
:initstart# 56
:null# 103
:receivepacket# 70
:rsw# 73
:scratch_write# 96
:start# 56
*-- no_destination 0
*$l0000!transferreg00 sram_rel 00 0 both 2 0x49
*$l0000!transferreg01 sram_rel 01 0 both 1 0x49
*l0000!channel_number gpr_b_rel 02
*l0000!t0 gpr_b_rel 02
*$l0000!temp0 sram_rel 00 0 both 2 0x43
*$l0000!temp1 sram_rel 01 0 both 1 0x43
;*l0000!temp!!2 gpr_b_rel 03
;*l0000!temp!!3 gpr_b_rel 03
;*l0000!temp!!4 gpr_b_rel 03
;*l0000!temp!!5 gpr_b_rel 03
;*l0000!temp!!6 gpr_a_rel 00
;*l0000!temp!!7 gpr_b_rel 03
;*l0000!temp!!8 gpr_b_rel 03
*l0000!temp gpr_b_rel 03
;*l0000!rxthreadlist!!2 gpr_a_rel 06
;*l0000!rxthreadlist!!3 gpr_b_rel 08
*l0000!rxthreadlist gpr_a_rel 06
;*l0000!msfaddress!!2 gpr_b_rel 08
;*l0000!msfaddress!!3 gpr_b_rel 08
*l0000!msfaddress gpr_b_rel 08
*l0000!bytecnt gpr_a_rel 01
*l0000!elem gpr_a_rel 02
;*l0000!rxconfigdata!!2 gpr_a_rel 03
*l0000!rxconfigdata gpr_b_rel 0B
*$l0000!rxconfigdata0 sram_rel 00 0 both 1 0x0
;*l0000!rxconfigdata0!!2 gpr_b_rel 09
*l0000!rxconfigdata0 gpr_b_rel 09
*l0000!null gpr_b_rel 0C
*l0000!error gpr_b_rel 0D
*l0000!rbuf gpr_a_rel 04
*l0000!ring gpr_b_rel 04
*l0000!bdptr gpr_b_rel 0E
*l0000!msfaddress0 gpr_b_rel 05
*l0000!msfaddress1 gpr_b_rel 09
*@l0000!sramdescbase gpr_a_abs 05
*@l0000!drampacketbase gpr_a_abs 15
*l0000!mask_qa gpr_b_rel 04
*$l0000!sr0 sram_rel 01 0 both 4 0x1B
*$l0000!sr1 sram_rel 02 0 both 3 0x1B
*$l0000!sr2 sram_rel 03 0 both 2 0x1B
*$l0000!sr3 sram_rel 04 0 both 1 0x1B
*l0000!got_pkt gpr_b_rel 0D
*@l0000!counter gpr_a_abs 25
*l0001!cellcount gpr_b_rel 0F
*l0001!freelist gpr_b_rel 01
*$l0001!s0 sram_rel 00 0 both 3 0x11
*$l0001!s1 sram_rel 01 0 both 2 0x11
*$l0001!s2 sram_rel 02 0 both 1 0x11
;*l0001!tmp!!2 gpr_b_rel 0B
;*l0001!tmp!!3 gpr_b_rel 0B
;*l0001!tmp!!4 gpr_a_rel 07
*l0001!tmp gpr_b_rel 0B
*l0002!temp_reg gpr_b_rel 05
*l0003!ctxenabledata gpr_b_rel 0C
*l0004!cur_me gpr_b_rel 06
*l0004!cur_ctx gpr_b_rel 07
*l0005!pkt_buff_addr gpr_b_rel 06
;*l0005!rel!!2 gpr_b_rel 0A
*l0005!rel gpr_b_rel 0A
*l0005!rbufoffset gpr_b_rel 07
;*l0005!refcnt!!2 gpr_b_rel 00
*l0005!refcnt gpr_b_rel 00
*l0005!freebuffer gpr_b_rel 01
*l0001!qa_init signal 01 0
*l0001!qa_init!!2 signal 01 0
*l0000!interthd_sig signal 0F 0
*l0000!next_ctx_sig signal 04 0
*l0000!rx_sig_thd signal 01 0
*l0000!sig_free_buf signal 01 0
*l0000!sig_dram_xfer1 signal 02 0
*l0000!scratch_sig signal 01 0
*l0000!msf_sig1 signal 01 0
*l0000!msf_sig1!!3 signal 01 0
*l0000!msf_sig1!!2 signal 01 0
.%type R
.%type SI
.%scope global
.%var l0005!freebuffer 0 R
.%liverange 0 B1 83:102
.%liverange 0 ~B1 70:82 103:103
.%var l0005!refcnt 0 R
.%liverange 0 B0 87:102
.%liverange 0 ~B0 70:86 103:103
.%var l0005!rbufoffset 0 R
.%liverange 0 B7 92:102
.%liverange 0 ~B7 70:91 103:103
.%var l0005!rel 0 R
.%liverange 0 B10 84:102
.%liverange 0 ~B10 70:83 103:103
.%var l0005!pkt_buff_addr 0 R
.%liverange 0 B6 86:102
.%liverange 0 ~B6 70:85 103:103
.%var l0004!cur_ctx 0 R
.%liverange 0 B7 60:69
.%liverange 0 ~B7 70:91 103:103
.%var l0004!cur_me 0 R
.%liverange 0 B6 59:69
.%liverange 0 ~B6 70:85 103:103
.%var l0003!ctxenabledata 0 R
.%liverange 0 B12 54:55
.%liverange 0 ~B12 56:73
.%var l0002!temp_reg 0 R
.%liverange 0 B5 40:55
.%liverange 0 ~B5 56:64
.%var l0001!tmp 0 R
.%liverange 0 B11 22:28
.%liverange 0 A7 29:55
.%liverange 0 ~A7 56:103
.%var $l0001!s2 0 R
.%liverange 0 $W2 26:55
.%liverange 0 ~$W2 56:103
.%liverange 0 $R2 104:104
.%var $l0001!s1 0 R
.%liverange 0 $W1 25:55
.%liverange 0 ~$W1 56:103
.%liverange 0 $R1 104:104
.%var $l0001!s0 0 R
.%liverange 0 $W0 24:47
.%liverange 0 $R0 104:104
.%var l0001!freelist 0 R
.%liverange 0 B1 32:55
.%liverange 0 ~B1 56:82 103:103
.%var l0001!cellcount 0 R
.%liverange 0 B15 34:55
.%liverange 0 ~B15 56:103
.%var @l0000!counter 0 R
.%liverange 0 @A37 0:103
.%var l0000!got_pkt 0 R
.%liverange 0 B13 1:69
.%liverange 0 ~B13 70:78 103:103
.%var $l0000!sr3 0 R
.%liverange 0 $W4 104:104
.%liverange 0 $R4 104:104
.%var $l0000!sr2 0 R
.%liverange 0 $W3 104:104
.%liverange 0 $R3 104:104
.%var $l0000!sr1 0 R
.%liverange 0 $W2 104:104
.%liverange 0 $R2 104:104
.%var $l0000!sr0 0 R
.%liverange 0 $W1 104:104
.%liverange 0 $R1 30:55 80:102
.%liverange 0 ~$R1 56:79 103:103
.%var l0000!mask_qa 0 R
.%liverange 0 B4 2:6
.%var @l0000!drampacketbase 0 R
.%liverange 0 @A21 0:103
.%var @l0000!sramdescbase 0 R
.%liverange 0 @A5 0:103
.%var l0000!msfaddress1 0 R
.%liverange 0 B9 66:103
.%var l0000!msfaddress0 0 R
.%liverange 0 B5 65:103
.%var l0000!bdptr 0 R
.%liverange 0 B14 97:102
.%liverange 0 ~B14 70:96 103:103
.%var l0000!ring 0 R
.%liverange 0 B4 7:103
.%var l0000!rbuf 0 R
.%liverange 0 A4 64:103
.%var l0000!error 0 R
.%liverange 0 B13 79:102
.%liverange 0 ~B13 70:78 103:103
.%var l0000!null 0 R
.%liverange 0 B12 74:103
.%liverange 0 ~B12 70:73
.%var l0000!rxconfigdata0 0 R
.%liverange 0 B9 14:55
.%liverange 0 ~B9 56:65
.%var $l0000!rxconfigdata0 0 R
.%liverange 0 $W0 16:23 48:55
.%liverange 0 ~$W0 56:97 103:103
.%liverange 0 $R0 104:104
.%var l0000!rxconfigdata 0 R
.%liverange 0 B11 67:67
.%liverange 0 A3 68:103
.%var l0000!elem 0 R
.%liverange 0 A2 77:102
.%liverange 0 ~A2 70:76 103:103
.%var l0000!bytecnt 0 R
.%liverange 0 A1 78:102
.%liverange 0 ~A1 70:77 103:103
.%var l0000!msfaddress 0 R
.%liverange 0 B8 17:55
.%liverange 0 ~B8 56:62
.%var l0000!rxthreadlist 0 R
.%liverange 0 A6 61:62
.%liverange 0 B8 63:103
.%var l0000!temp 0 R
.%liverange 0 B3 41:55 58:93 95:103
.%liverange 0 ~B3 40:40 56:57
.%liverange 0 A0 94:94
.%var $l0000!temp1 0 R
.%liverange 0 $W1 19:24
.%liverange 0 $R1 104:104
.%var $l0000!temp0 0 R
.%liverange 0 $W0 98:102
.%liverange 0 ~$W0 70:97 103:103
.%liverange 0 $R0 104:104
.%var l0000!t0 0 R
.%liverange 0 B2 5:103
.%var l0000!channel_number 0 R
.%liverange 0 B2 4:4
.%var $l0000!transferreg01 0 R
.%liverange 0 $W1 0:18
.%liverange 0 ~$W1 56:103
.%liverange 0 $R1 0:29