line_rate_bd_in_tx.list

开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测

+version:  10/31/2000
+switches:  
+uca_version: 3.0.411
+uca_date: Sep  9 2002 00:25:20
+current_date: Mon Dec 02 18:51:06 2002

.cpu_version 0x00000002 0 15

.%num_contexts 8

.%local_mem0_mode rel
.%local_mem1_mode rel

.%init_nn_mode neighbor

:cont1# 56
:init# 7
:init_common# 0
:transmit# 47
:wait_for_assignment# 37
:wait_for_next_ctx_sig# 36
*-- no_destination 0
;*l0000!temp!!2 gpr_b_rel 04
;*l0000!temp!!3 gpr_b_rel 04
*l0000!temp gpr_b_rel 04
;*l0000!msfaddress!!2 gpr_b_rel 05
*l0000!msfaddress gpr_b_rel 05
*l0000!byte_count gpr_a_rel 00
*l0000!ring_num gpr_b_rel 00
*l0000!mask_qa gpr_b_rel 01
;*l0000!txconfigdata0!!2 gpr_a_rel 06
*l0000!txconfigdata0 gpr_a_rel 06
*$l0000!txconfigdata0 sram_rel 00 0 both 1 0x0
*$l0000!txcontrolword0 sram_rel 00 0 both 2 0x25
*$l0000!txcontrolword1 sram_rel 01 0 both 1 0x25
*$l0000!scratch_data0 sram_rel 00 0 both 2 0x21
*$l0000!scratch_data1 sram_rel 01 0 both 1 0x21
*@l0000!tbuf_element gpr_b_abs 02
*l0000!cur_tbuf_elem gpr_a_rel 01
*l0000!buf_addr gpr_a_rel 02
*l0000!tbuf gpr_b_rel 03
;*l0000!tbuf_mask!!2 gpr_b_rel 06
*l0000!tbuf_mask gpr_b_rel 06
;*l0000!cur_tbuf_addr!!2 gpr_b_rel 07
;*l0000!cur_tbuf_addr!!3 gpr_a_rel 03
*l0000!cur_tbuf_addr gpr_b_rel 07
*@l0000!sramdescbase gpr_b_abs 12
*@l0000!drampacketbase gpr_b_abs 22
*@l0000!t0 gpr_b_abs 32
;*l0001!channel_number!!2 gpr_b_rel 08
*l0001!channel_number gpr_b_rel 08
*$l0002!scratch_base sram_rel 00 0 both 1 0x0
*$l0002!scratch_head sram_rel 01 0 both 1 0x0
*$l0002!scratch_tail sram_rel 02 0 both 1 0x0
;*l0003!refcnt!!2 gpr_b_rel 09
;*l0003!refcnt!!3 gpr_b_rel 09
*l0003!refcnt gpr_b_rel 09
;*l0003!pkt_buf_addr!!2 gpr_a_rel 04
*l0003!pkt_buf_addr gpr_a_rel 04
;*l0004!msfaddress!!2 gpr_a_rel 05
*l0004!msfaddress gpr_b_rel 0A
;*l0005!temp!!2 gpr_a_rel 07
*l0005!temp gpr_a_rel 07
*l0005!cellcount gpr_a_rel 08
*l0005!t0 gpr_b_rel 0B
*l0002!scratch_sig3 signal 03 0
*l0002!scratch_sig2 signal 02 0
*l0002!scratch_sig1 signal 01 0
*l0000!next_ctx_sig signal 04 0
*l0000!scratch_sig signal 01 0
*l0000!interthd_sig signal 0F 0
*l0000!msf_sig signal 01 0
*l0000!msf_sig!!3 signal 01 0
*l0000!msf_sig!!2 signal 01 0
*l0000!dram_sig signal 02 0
.%type R
.%type SI
.%scope global
.%var l0005!t0 0 R
.%liverange 0 B11 73:78
.%liverange 0 ~B11 37:72
.%var l0005!cellcount 0 R
.%liverange 0 A8 76:78
.%liverange 0 ~A8 37:75
.%var l0005!temp 0 R
.%liverange 0 A7 74:78
.%liverange 0 ~A7 37:73
.%var l0004!msfaddress 0 R
.%liverange 0 B10 63:63
.%liverange 0 A5 64:78
.%liverange 0 ~A5 37:62
.%var l0003!pkt_buf_addr 0 R
.%liverange 0 A4 48:78
.%liverange 0 ~A4 37:47
.%var l0003!refcnt 0 R
.%liverange 0 B9 53:78
.%liverange 0 ~B9 37:52
.%var $l0002!scratch_tail 0 R
.%liverange 0 $W2 28:35
.%liverange 0 ~$W2 37:78
.%liverange 0 $R2 79:79
.%var $l0002!scratch_head 0 R
.%liverange 0 $W1 27:35
.%liverange 0 ~$W1 37:68
.%liverange 0 $R1 79:79
.%var $l0002!scratch_base 0 R
.%liverange 0 $W0 26:35
.%liverange 0 ~$W0 37:65
.%liverange 0 $R0 79:79
.%var l0001!channel_number 0 R
.%liverange 0 B8 13:35
.%liverange 0 ~B8 37:78
.%var @l0000!t0 0 R
.%liverange 0 @B50 0:78
.%var @l0000!drampacketbase 0 R
.%liverange 0 @B34 0:78
.%var @l0000!sramdescbase 0 R
.%liverange 0 @B18 0:78
.%var l0000!cur_tbuf_addr 0 R
.%liverange 0 B7 50:51
.%liverange 0 A3 52:78
.%liverange 0 ~A3 37:49
.%var l0000!tbuf_mask 0 R
.%liverange 0 B6 5:78
.%var l0000!tbuf 0 R
.%liverange 0 B3 4:78
.%var l0000!buf_addr 0 R
.%liverange 0 A2 41:78
.%liverange 0 ~A2 37:40
.%var l0000!cur_tbuf_elem 0 R
.%liverange 0 A1 43:78
.%liverange 0 ~A1 37:42
.%var @l0000!tbuf_element 0 R
.%liverange 0 @B2 0:78
.%var $l0000!scratch_data1 0 R
.%liverange 0 $W1 79:79
.%liverange 0 $R1 79:79
.%var $l0000!scratch_data0 0 R
.%liverange 0 $W0 79:79
.%liverange 0 $R0 38:78
.%liverange 0 ~$R0 37:37
.%var $l0000!txcontrolword1 0 R
.%liverange 0 $W1 69:78
.%liverange 0 ~$W1 37:68
.%liverange 0 $R1 79:79
.%var $l0000!txcontrolword0 0 R
.%liverange 0 $W0 66:78
.%liverange 0 ~$W0 37:65
.%liverange 0 $R0 79:79
.%var $l0000!txconfigdata0 0 R
.%liverange 0 $W0 19:25
.%liverange 0 $R0 79:79
.%var l0000!txconfigdata0 0 R
.%liverange 0 A6 17:35
.%liverange 0 ~A6 37:78
.%var l0000!mask_qa 0 R
.%liverange 0 B1 1:78
.%var l0000!ring_num 0 R
.%liverange 0 B0 3:78
.%var l0000!byte_count 0 R
.%liverange 0 A0 42:78
.%liverange 0 ~A0 37:41
.%var l0000!msfaddress 0 R
.%liverange 0 B5 16:35
.%liverange 0 ~B5 37:78
.%var l0000!temp 0 R
.%liverange 0 B4 33:35 65:78
.%liverange 0 ~B4 37:64
.%var l0002!scratch_sig3 1 R
.%liverange 0 G3 31:32
.%var l0002!scratch_sig2 1 R
.%liverange 0 G2 30:32
.%var l0002!scratch_sig1 1 R
.%liverange 0 G1 29:32
.%var l0000!next_ctx_sig 1 R
.%liverange 0 G4 36:37 62:71
.%var l0000!scratch_sig 1 R
.%liverange 0 G1 38:38
.%var l0000!interthd_sig 1 R
.%liverange 0 G15 79:79
.%var l0000!msf_sig 1 R
.%liverange 0 G1 20:20 25:25 70:71
.%var l0000!dram_sig 1 R
.%liverange 0 D2 61:62
.%scope end
.0 F00FF007FF common_code
	.import_var __chip_id __chip_revision __uengine_id
	.%line 71 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg l0000!sram_addr
	.%line 72 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg l0000!temp $l0000!temp
	.%line 73 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg l0000!msfaddress l0000!msfaddress0 l0000!msfaddress1
	.%line 74 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg l0000!byte_count l0000!ring_num l0000!mask_qa
	.%line 75 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg l0000!txconfigdata0
	.%line 76 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg $l0000!txconfigdata0
	.%line 77 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg $l0000!txcontrolword0 $l0000!txcontrolword1
	.%line 78 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg $l0000!scratch_data0 $l0000!scratch_data1
	.%line 79 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg @l0000!tbuf_element l0000!cur_tbuf_elem
	.%line 80 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg l0000!buf_addr l0000!pkt_buff_addr l0000!tbuf l0000!tbuf_mask l0000!cur_tbuf_addr
	.%line 81 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.reg @l0000!sramdescbase @l0000!drampacketbase @l0000!t0
	.%line 82 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.sig l0000!dram_sig l0000!msf_sig l0000!interthd_sig l0000!cap_sig l0000!scratch_sig l0000!next_ctx_sig
	.%line 83 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.sig l0000!sram_sig
	.%line 85 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.xfer_order $l0000!txcontrolword0 $l0000!txcontrolword1
	.%line 86 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.xfer_order $l0000!scratch_data0 $l0000!scratch_data1
	.%line 88 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.addr l0000!interthd_sig 15
	.%line 89 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	.set_sig l0000!interthd_sig l0000!next_ctx_sig
	.%line 91 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	init_common#:
	.%line 92 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed[l0000!mask_qa, 65535]
.1 F4400007FF common_code
	.%line 93 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed_w1[l0000!mask_qa, 255]
.2 F000000300 common_code
	.%line 94 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed[l0000!ring_num, 0]
.3 F002000F00 common_code
	.%line 95 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed[l0000!tbuf, 0x2000]
.4 F000001B30 common_code
	.%line 96 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed[l0000!tbuf_mask, 48]
.5 BAC0601B01 common_code
	.%line 97 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		alu[l0000!tbuf_mask, l0000!tbuf_mask, -, 1]
.6 D809000011 common_code
	.%line 99 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0 36
		br!=ctx[0, wait_for_next_ctx_sig#]
.7 F000020B00 common_code
	.%line 101 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
	init#:
	.%line 102 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed[@l0000!tbuf_element, 0]
.8 F000024B00 common_code
	.%line 104 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed[@l0000!sramdescbase, 0]
.9 F440024B20 common_code
	.%line 105 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed_w1[@l0000!sramdescbase, 32]
.10 F000028B00 common_code
	.%line 107 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed[@l0000!drampacketbase, 0]
.11 F440128B00 common_code
	.%line 108 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0
		immed_w1[@l0000!drampacketbase, 256]
.12 9020808600 common_code
	.%line 110 "C:\Angel-Island\diag\test_suites\microcode\line_rate_bd\line_rate_bd_in_tx.uc" 1 0