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📄 power_diag.c

📁 开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测
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		for (ctr = 0; ctr < PKT_64_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_64_0 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data64_0[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_138_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_138_0 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data138_0[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_96_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_96_1 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data96_1[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_64_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_64_1 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data64_1[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_138_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_138_1 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data138_1[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_96_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_96_2 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data96_2[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_64_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_64_2 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data64_2[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_138_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_138_2 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data138_2[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_96_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_96_3 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data96_3[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_64_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_64_3 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data64_3[(ctr / 4)]);
		}

		for (ctr = 0; ctr < PKT_138_SZ; ctr+=4)
		{
			PUT32((DRAM_BASE_SRC + ((RING_DATA_138_3 >> 8) & (MASK_16BIT << 8)) + ctr), pl_sys_lb_data138_3[(ctr / 4)]);
		}

		PUT32((PCI_LOCAL_CSR_BASE + MAILBOX_0_OFF), 0);

//		pkt_size = PACKET_SIZE;

		// Invoke the slave's PCI doorbell
		//Set_Pci_Doorbell(PTLONE_SYS_LPBK, (slave_dev_info.base_map[CSR_BAR] + PCI_CSR_BASE_FRM_PCI + XSCALE_DOORBELL_OFF));
		Set_Pci_Doorbell(PTLONE_MPHY_LPBK, (slave_dev_info.base_map[CSR_BAR] + PCI_CSR_BASE_FRM_PCI + XSCALE_DOORBELL_OFF));
		ctr = 0;

		// Wait for a signal that slave NPU has completed loading of ucode and init
		do
		{
			if (ctr == 1500)	// After 10 seconds
			{
				eprintf("\nTimed out...Slave NPU was not able to load microcode and init.\n");
				mailbox_value = INIT_ERROR;
				flag = ERROR;
				break;
			}

			temp = GET32(slave_mailbox0_addr);

			hal_delay_us(10000);
			ctr++;
		}
		while (temp == 0);
		
		if (flag == OK)	// If slave completed microcode loading successfully
		{
			// Load Master's NPU with ucode and init
//			DownLoadUcode(PL_SYS_LOOPBACK_EG_TX_ME, Sz_pl_sys_loopback_eg_tx, (UINT32 *)pl_sys_loopback_eg_tx);
//			DownLoadUcode(PL_SYS_LOOPBACK_EG_RX_ME, Sz_pl_sys_loopback_eg_rx, (UINT32 *)pl_sys_loopback_eg_rx);
			DownLoadUcode(PL_SYS_LOOPBACK_EG_TX_ME, Sz_mphy_loopback_eg_tx, (UINT32 *)mphy_loopback_eg_tx);
			DownLoadUcode(PL_SYS_LOOPBACK_EG_RX_ME, Sz_mphy_loopback_eg_rx, (UINT32 *)mphy_loopback_eg_rx);

			hal_delay_us(1000000);

//			eprintf("DEBUG: (sizeof(tx_data_pl) / sizeof(UINT32)) / 4 = %d\n", ((sizeof(tx_data_pl) / sizeof(UINT32)) / 4));
//iteration = 4;
//ports=4;
			do
			{
				//for (combination = 0; combination < ((sizeof(tx_data_pl) / sizeof(UINT32)) / 4); combination++)
				for (combination = 0; combination < pnum; combination++)
				{
					
					for (port_ctr = 0; port_ctr < iteration; port_ctr++)
					{
						if (ports != 4)
						{
							port_num = ports;
							PUT32((SCR_RING_INSTR_ADDR + (port_num << 2)), pktptr[combination]);
						}
						else
						{
							if (cflag)
								port_num = port_ctr*2;
							else
								port_num = port_ctr;

							PUT32((SCR_RING_INSTR_ADDR + (port_num << 2)), tx_data_pl[((combination * 4) + port_num)]);
						}
					}
				}

//					data_to_send = tx_data_pl[internal_loop_count];
//					eprintf("DEBUG: internal_loop_count = %d\n", internal_loop_count);
//					eprintf("DEBUG: data_to_send = 0x%08X\n", data_to_send);
//					PUT32(scratch_ring_tx, data_to_send);

				//for (combination = 0; combination < ((sizeof(tx_data_pl) / sizeof(UINT32)) / 4); combination++)
				for (combination = 0; combination < pnum; combination++)
				{
					flag = OK;
					//for (port_num = 0; port_num < 4; port_num++)
					for (port_ctr = 0; port_ctr < iteration; port_ctr++)
					{
						if (ports != 4)
							port_num = ports;
						else
						{
							if (cflag)
								port_num = port_ctr*2;
							else
								port_num = port_ctr;
						}
						//eprintf("iteration = %d, port = %d\n",iteration,port_num);

						ctr = 0;
						//scratch_read_value = 0;

						do			// Do while waiting for all the packets to be transmitted
						{
							if (ctr == 1000)	// After 1 second
							{
								eprintf("\nTimed out...No indication from scratch ring that all packets were transmitted\n");
								mailbox_value = NOT_SENT;
								flag = ERROR;
								//txerr=1;
								break;
							}

							// Poll on scratch ring to check if the packets have been transmitted
							if ((scratch_read_value = GET32(scratch_ring_tx_count)) == 0)
							{
								hal_delay_us(2);
								ctr++;
							}
							else
							{
								switch(ports)
								{
									case 0 : 
									case 1 : 
									case 2 : 
									case 3 : 
											eprintf("Transmitted on port %d: %d\r", ports,(scratch_read_value));
											
											break;
    
									case 4 : // all ports 
											if (!cflag)
											{
												eprintf("Transmitted on ports 0-3 : %d\r", (scratch_read_value)/4);
												iteration = 4;
											}
											else
											{
												eprintf("Transmitted on ports 0 and 2 : %d\r", (scratch_read_value)/2);
												iteration = 2;
											}
											break;
								}
								//eprintf("Transmitted Packets (total): %d\r", scratch_read_value);
								tx_count++;
								  
							}
						}
						while (scratch_read_value == 0);

						PUT32(scratch_ring_tx_count, 0);

						tx_count =  scratch_read_value;
						if (flag == ERROR)
						{
							break;
						}
					}

					if (flag == ERROR)
					{
						break;
					}
				}

				if (flag == ERROR)
				{
					break;
				}
				
				for (combination = 0; combination < pnum; combination++)
				{
					for (port_ctr = 0; port_ctr < iteration; port_ctr++)
					{
						if (!cflag)
						{
							if (ports != 4)
								port_num = ports;
							else
								port_num = port_ctr;
						}
						else
						{
							if (ports != 4)
								port_num = rxport[ports];
							else
								port_num = port_ctr*2 + 1;
						}


						ctr = 0;

						do			// Do while waiting for a signal that a packet has been received
						{
							if (ctr == 300)	// After 1 second
							{
								eprintf("\nTimed out...No indication from scratch ring that all packets were received\n");
								mailbox_value = NOT_RECEIVED;
								flag = ERROR;
								rxerr=1;
								break;
							}

							// Poll on scratch ring to check if packets have been received
							if ((scratch_read_value = GET32(scratch_ring_rx)) == 0)
							//if ((scratch_read_value = swap32(GET32(slave_dev_info.base_map[CSR_BAR] + PCI_CSR_BASE_FRM_PCI + MAILBOX_0_OFF))) != 0xF8F8)
							{
								hal_delay_us(100);
								ctr++;
							}
							//eprintf("port %d  scratch_read_value = 0x%x\n",port_num,scratch_read_value);
						}
						while (scratch_read_value == 0);
						//eprintf("a. flag = %d port = %d\n",flag,port_num);

						if (flag == ERROR)
						{
							break;
						}

						//eprintf("DEBUG: scratch_read_value = 0x%08X\n", scratch_read_value);

						rx_count++;
						pkt_size = scratch_read_value & MASK_8BIT;
						rx_port_num = (scratch_read_value >> 8) & MASK_8BIT;
						dram_addr = DRAM_BASE_DEST + ((scratch_read_value >> 16) << 8);
						// set the port on which packet was received.
						pass_port[rx_port_num]++;
						rxflag[rx_port_num] = OK;

						/* Vallejo WORKAROUND : Vallejo is not stripping of the CRC 
											for 96 byte packets in gig/half duplex mode */
						if ((pkt_size == 0x60) || (pkt_size == 0x40) || (pkt_size == 0x8A))
						{
							eprintf("\npacket size = 0x%x\n",pkt_size);
							pkt_size = pkt_size - 4;
						}
						/****** end of Workaround *******/

						if (ports == 4)
						{
							exp_pkt_sz = tx_data_pl[((combination * 4) + port_num)] & 0xFFFF;
							//eprintf("pkt size from pktptr: %d\n",exp_pkt_sz);
						}
						else
						{
							exp_pkt_sz = pktptr[combination] & 0xFFFF;

							//eprintf("Expected pkt size: 0x%x\n",exp_pkt_sz);
						}

						// temp. workaround 
						//exp_pkt_sz = exp_pkt_sz + 4;

						//eprintf("combination = %d   port = %d\n",combination,port_num);	 
						
						//if (pkt_size != (tx_data_pl[((combination * 4) + port_num)] & 0xFFFF))
						if (pkt_size != exp_pkt_sz)
						{
							eprintf("\npacket size = 0x%x\n",pkt_size);
							eprintf("pkt size from pktptr: 0x%x\n",exp_pkt_sz);
							//eprintf("combination = %d   port = %d\n",combination,port_num);	 

							mailbox_value = INCORRECT_SIZE;
							flag = ERROR;		// Set flag as error
							rxflag[rx_port_num] = ERROR;
							break;
						}

						if (cflag)
						{
							switch(rx_port_num)
							{
								case 0:  // rx on port 0 , check for pkt transmitted from port 1
									if (pkt_size == (RING_DATA_96_1 & MASK_16BIT) )
									{
										orig_data_size = PKT_96_SZ ;
										pl_sys_lb_data = (UINT32 *)pl_sys_lb_data96_1;
									}
									else if (pkt_size == (RING_DATA_64_1 & MASK_16BIT))
									{
										orig_data_size = PKT_64_SZ ;
										pl_sys_lb_data = (UINT32 *)pl_sys_lb_data64_1;
									}
									else if (pkt_size == (RING_DATA_138_1 & MASK_16BIT))
									{
										orig_data_size = PKT_138_SZ;
										pl_sys_lb_data = (UINT32 *)pl_sys_lb_data138_1;
									}
									else
										bad_pkt_size = 1;
									break;

								case 1:  // rx on port 1 , check for pkt transmitted from port 0
									if (pkt_size == (RING_DATA_96_0 & MASK_16BIT))
									{
										//eprintf("received 96 byte on port 1\n");
										orig_data_size = PKT_96_SZ ;
										pl_sys_lb_data = (UINT32 *)pl_sys_lb_data96_0;
									}
									else if (pkt_size == (RING_DATA_64_0 & MASK_16BIT))
									{
										orig_data_size = PKT_64_SZ ;
										pl_sys_lb_data = (UINT32 *)pl_sys_lb_data64_0;
									}
									else if (pkt_size == (RING_DATA_138_0 & MASK_16BIT))
									{
										orig_data_size = PKT_138_SZ ;
										pl_sys_lb_data = (UINT32 *)pl_sys_lb_data138_0;
									}
									else 
										bad_pkt_size = 1;
									break;
								case 2:  // rx on port 2 , check for pkt transmitted from port 3
									if (pkt_size == (RING_DATA_96_3 & MASK_16BIT))
									{
										orig_data_size = PKT_96_SZ ;
										pl_sys_lb_data = (UINT32 *)pl_sys_lb_data96_3;
									}
									else if (pkt_size == (RING_DATA_64_3 & MASK_16BIT))
									{
										orig_data_size = PKT_64_SZ ;
										pl_sys_lb_data = (UINT32 *)pl_sys_lb_data64_3;

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