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📄 wmark_diag.c

📁 开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测
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/*
 *-------------------------------------------------------------------------------
 *                                                                      
 *                  I N T E L   P R O P R I E T A R Y                   
 *                                                                      
 *     COPYRIGHT (c)  2002 BY  INTEL  CORPORATION.  ALL RIGHTS          
 *     RESERVED.   NO  PART  OF THIS PROGRAM  OR  PUBLICATION  MAY      
 *     BE  REPRODUCED,   TRANSMITTED,   TRANSCRIBED,   STORED  IN  A    
 *     RETRIEVAL SYSTEM, OR TRANSLATED INTO ANY LANGUAGE OR COMPUTER    
 *     LANGUAGE IN ANY FORM OR BY ANY MEANS, ELECTRONIC, MECHANICAL,    
 *     MAGNETIC,  OPTICAL,  CHEMICAL, MANUAL, OR OTHERWISE,  WITHOUT    
 *     THE PRIOR WRITTEN PERMISSION OF :                                
 *                                                                      
 *                        INTEL  CORPORATION                            
 *                                                                     
 *                     2200 MISSION COLLEGE BLVD                        
 *                                                                      
 *               SANTA  CLARA,  CALIFORNIA  95052-8119                  
 *                                                                      
 * ------------------------------------------------------------------------------
 */

#include "diag_utils.h"
#include "syslog.h"
#include "led.h"
#include "diagstruct.h"
#include "msf_common.h"
#include "misc_func.h"
#include "memory.h"
#include "uc_load.h"
#include "media_loopback.h"

#include "mac_util.h"
#include "error_code.h"
#include "error_map.h"
#include "reg_api.h"
#include "register_map.h"
#include "uart.h"
#include "diag.h"
#include "dp_proto.h"
#include "hal_platform_ints.h"
#include "pci_diag.h"
#include "pci.h"
#include "mac_init.h"

extern pci_device slave_dev_info;		// for slave npu info.
extern const int pl_media_lpbk_jumboFrame_tx[];
extern const int pl_media_lpbk_jumboFrame_rx[];

extern UINT32 data64_0[];
extern UINT32 data96_0[];
extern UINT32 data138_0[];
extern UINT32 data64_1[];
extern UINT32 data96_1[];
extern UINT32 data138_1[];
extern UINT32 data64_2[];
extern UINT32 data96_2[];
extern UINT32 data138_2[];
extern UINT32 data64_3[];
extern UINT32 data96_3[];
extern UINT32 data138_3[];
extern UINT32 data256_0[];
extern UINT32 data512_0[];
extern UINT32 data1024_0[];
extern UINT32 data1520_0[];
extern UINT32 data5K_0[];
extern UINT32 data10K_0[];

extern UINT32 fs_tx_data_pl[];
extern UINT32 fs_tx_data_pl_0[];
extern UINT32 fs_tx_data_pl_1[];
extern UINT32 fs_tx_data_pl_2[];
extern UINT32 fs_tx_data_pl_3[];

extern UINT32 tx_data_pl[];
extern UINT32 tx_data_pl_0[];
extern UINT32 tx_data_pl_1[];
extern UINT32 tx_data_pl_2[];
extern UINT32 tx_data_pl_3[];

extern void Msf_OutOfReset(void);
extern int Msf_PLL(void);
extern void Set_Rcomp(void);
extern int DownLoadUcode(unsigned short Uengine, unsigned short SizeUcode, unsigned int *Ucode);
extern UINT32 init_mac_dev(UINT32);
extern UINT32 validate_params(void);
extern unsigned int htoi(char *s);

#define DRAM_BASE_OFFSET		0x1000000 
#define PKT_SIZE				60
#define SCRATCH_MSG_BASE		0x1000
#define CHANNEL1_BASE_ADDRESS	0x90000000
#define RING1					SCR_RING_INSTR_ADDR+0x4
#define SRAM_DESC_BASE			0x200000
#define PAUSE_RECVD				0xF6F6

/** globals **/
extern UINT32 total_args,loop,speed,ports;  
extern UINT8 test_param;
extern char channel,test_opt;
extern UINT32 PKT_96_SZ,PKT_64_SZ,PKT_138_SZ;
extern UINT32 PKT_256_SZ,PKT_512_SZ,PKT_1024_SZ;
extern UINT32 PKT_1520_SZ,PKT_5K_SZ,PKT_10K_SZ;
extern UINT32 PKT_SEQ_SZ,ALL_PORT_PKT_SEQ_SZ;
extern UINT32 rxport[4];
extern UINT32 Sz_pl_media_lpbk_jumboFrame_tx, Sz_pl_media_lpbk_jumboFrame_rx; 

extern void verify_frame(UINT32 pkt_size, UINT32*ds, UINT32*media_lb_data, UINT32 rx_port_num);
extern UINT32 get_pkt_seq(UINT32 **pktptr, UINT32 *num_frames,UINT32 cflag,UINT32 ports);
extern void makePkt(UINT32 size);

short verify_underRun(short cflag);
short verify_flowControl(short cflag);

// ******************************************************************************
// Function: void lpbk_test(void)
//
// This function is called by the Test Manager when the user invokes the
// media loopback test
// ******************************************************************************
UINT32 wmark_test(void)
{
	UINT32 ctr, flag, status,port;
	UINT32 slave_mailbox0_addr, slave_mailbox1_addr, slave_mailbox2_addr, slave_mailbox3_addr;
	volatile int mailbox_value, temp, stop = 0;
	UINT32 dcache_status, test_passed=0;
	UINT32 loop_count, forever = 0, packet_num = 0;
	register PDiagCommon acL = (PDiagCommon) ACADDRESS;
	UINT32 put_ring_base, get_ring_addr;
	UINT32 *pktptr=0, fail_port=0xFF;
	UINT32 port_ctr = 0,msg=0, txok = 0,pnum=0;
	short iteration = 1, port_num=0,txpkts = 0,per_port_pkts = 0;
	short cflag = 0,combination=0,port_number=0;

    channel = 'f';		

	total_args = acL->argc;
	test_opt = acL->argv[2][0];
	channel = acL->argv[4][0]; 		   	
	speed = acL->decArg[5];	
	port_number = acL->decArg[6];
	loop = acL->decArg[7];
	ports = port_number;

	test_param = acL->argv[3][0];

	if (validate_params() == INVALID_PARAMETERS)
	{
		eprintf("Invalid parameters. \n");
		return INVALID_PARAMETERS;
	}
	if (total_args <= 7)
	{
		loop = 1;
	}
		
	if (channel == 'c')
	{
		cflag = 1;
	}

	if (loop == 0)
	{
		forever = 1;
	}
	else
	{
		forever = 0;
	}

	put_ring_base = SCR_RING_INSTR_ADDR;
	get_ring_addr = SCR_RING_INSTR_ADDR + (4 << 2);

	if(acL->HostType == MASTER)		// if master NPU
	{
		flag = OK;

		Msf_OutOfReset();
		status = Msf_PLL();
		if (status == ERROR)
		{
			return ABORT;
		}

		// initializing media card
		status=init_mac_dev(0);	
		if (status != DONE)
		{
			eprintf("Aborting Test\n");
			return ABORT;
		}

		spConfig();
	    reg_write(0x5b2,0x0);

		switch(test_param)
		{
		case 't':  /* TX FIFO watermark test */
			for(ctr=0;ctr<4;ctr++)
			{
				/* Configure max frame size to 12K*/
				reg_write((0xF + 0x80*ctr), 0x3000);
				/* Configure FC Enable */
				reg_write((0x12 + 0x80*ctr), 0x3);
				/* Tx FIFO high watermark */
				reg_write((PORT0_TX_HIGH_WATERMARK + ctr), 0x2000);
				/* Tx FIFO low watermark */
				reg_write((PORT0_TX_LOW_WATERMARK + ctr), 0x0);
				/* Tx FIFO MAC threshold */
				reg_write((PORT0_TX_MAC_THRESHOLD + ctr), 0x0);

			}
			break;
		case 'r':  /* RX FIFO watermark test */
			for(ctr=0;ctr<4;ctr++)
			{
				/* Configure max frame size to 12K*/
				reg_write((0xF + 0x80*ctr), 0x3000);
				/* Configure FC Enable */
				reg_write((0x12 + 0x80*ctr), 0x3);
				/* Rx FIFO high watermark */
				reg_write((PORT0_RX_HIGH_WATERMARK + ctr), 0x30);
				/* Rx FIFO low watermark */
				reg_write((PORT0_RX_LOW_WATERMARK + ctr), 0x20);
			}
			break;
		}
	    spRestore();

		clear_stat_regs();

		dcache_status = get_CP15() & DCACHE_BIT;
		if(dcache_status != 0)	// if dcache ON
		{
			dcache_off();
		}

		makePkt(256);
		makePkt(512);
		makePkt(1024);
		makePkt(1520);
		makePkt(5*1024);
		makePkt(10*1024);

		// write packet to be transmitted on each port, into DRAM.
		write_pkt_to_dram();
		iteration=get_pkt_seq(&pktptr, &pnum,cflag,port_number);

		*(PCI_ADDR_EXT_REG) = (slave_dev_info.base_address[CSR_BAR] & 0xE0000000) >> 16;
		slave_mailbox0_addr = slave_dev_info.base_map[CSR_BAR] + PCI_CSR_BASE_FRM_PCI + MAILBOX_0_OFF;
		slave_mailbox1_addr = slave_dev_info.base_map[CSR_BAR] + PCI_CSR_BASE_FRM_PCI + MAILBOX_1_OFF;
		slave_mailbox2_addr = slave_dev_info.base_map[CSR_BAR] + PCI_CSR_BASE_FRM_PCI + MAILBOX_2_OFF;
		slave_mailbox3_addr = slave_dev_info.base_map[CSR_BAR] + PCI_CSR_BASE_FRM_PCI + MAILBOX_3_OFF;

		// Init master's mailbox0 to 0
		PUT32((PCI_LOCAL_CSR_BASE + MAILBOX_0_OFF), 0);

		// Init slave's mailbox0 and mailbox2 to 0
		PUT32(slave_mailbox0_addr, 0);
		PUT32(slave_mailbox3_addr, 0);
		
		loop_count = loop;
		msg = (cflag << 31) | ((loop & 0x7FFF)<<16) | port_number;

#ifdef __ARMEB__
		PUT32(slave_mailbox2_addr, SWAP32(msg));
#else
		PUT32(slave_mailbox2_addr, msg);
#endif

		Set_Pci_Doorbell(PTLONE_SYS_LPBK2, (slave_dev_info.base_map[CSR_BAR] + PCI_CSR_BASE_FRM_PCI + XSCALE_DOORBELL_OFF));

		ctr = 0;
		do		// Wait for a signal that slave NPU has completed loading of ucode and init
		{
			if (ctr == 1500)	// After 15 seconds
			{
				mailbox_value = INIT_ERROR;
				flag = ERROR;
				break;
			}

			temp = swap32(GET32(slave_mailbox3_addr));

			hal_delay_us(10000);
			ctr++;
		}
		while (temp == 0);

		if (temp != INIT_COMPLETE)
		{
			eprintf("MSF init failure on Ingress ...\n");
			return ABORT;
		}
			
        status = DownLoadUcode(PTLONE_MEDIA_LOOPBACK_TX_ME, Sz_pl_media_lpbk_jumboFrame_tx, (UINT32 *)(pl_media_lpbk_jumboFrame_tx));
		if (status != OK)
		{
			eprintf("Error downloading microcode on Master NPU ...\n");
			return ABORT;
		}

		hal_delay_us(1000);

		if (loop_count == 0)
		{
		    forever = 1;
		}
		while ((9*loop_count != per_port_pkts) || forever)
		{

		    if (forever && KEYPRESS)
		    {
				stop = 1;
				PUT32(slave_mailbox2_addr, stop);
		    }

			// put byte count in the scratch ring locations for all the 4 ports.	

			for (combination = 0; combination < pnum; combination++)
			{
				for (port = 0; port < iteration; port++)
				{
					if (port_number != 4)
					{
						port_num = port_number;
						PUT32((SCR_RING_INSTR_ADDR + (port_num << 2)), pktptr[combination]);
						//eprintf("location = 0x%08X pktptr[%d] = 0x%x \n",(SCR_RING_INSTR_ADDR + (port_num << 2)),combination,pktptr[combination]);
					}
					else
					{
						if (cflag)
							port_num = port*2;
						else
							port_num = port;
							PUT32((SCR_RING_INSTR_ADDR + (port_num << 2)), fs_tx_data_pl[((combination * 4) + port_num)]);
					}
				}
			}


		   //hal_delay_us(100000);

			for (combination = 0; combination < pnum; combination++)
			{
				//for (port_num = 0; port_num < 4; port_num++)
				for (port_ctr = 0; port_ctr < iteration; port_ctr++)
				{
					if (port_number != 4)
						port_num = port_number;
					else
					{
						if (cflag)
							port_num = port_ctr*2;
						else
							port_num = port_ctr;
					}

					ctr = 0;
					do	// check if the packet was transmitted by master NPU
					{
		   				if (ctr == 700000)	// After 3 seconds
						{
							mailbox_value = NOT_SENT;
							flag = ERROR;
							break;
						}

						// Poll on scratch ring to check if packet was transmitted
						mailbox_value = GET32(get_ring_addr);

						hal_delay_us(1);
						ctr++;
					}
					while (mailbox_value != 0);
					txpkts = mailbox_value;
					if (flag == ERROR)
					{
			            fail_port = port_ctr;		
						break;
			        }
					packet_num++;
				}  // end of port for loop

				if (flag == ERROR)
					break;
			}

	        if (flag == OK)		// If master has successfully transmitted packets
  		    {
				txok = 1;	
				eprintf("Transmitted : %d\r",packet_num);
				ctr = 0;
				mailbox_value = 0;
				do	// Wait for a signal from the slave for indication of completion of test
				{
 		            if (ctr == 500000)	// After 3 seconds
					{
			            mailbox_value = SLAVE_MAILBOX1_NO_SIG;
			            flag = ERROR;
			            break;
					}

		            // Poll on slave's MAILBOX1 to check if packet was received by slave
			        mailbox_value = GET32(slave_mailbox1_addr);

 			        hal_delay_us(10);
			        ctr++;
				}
				while (mailbox_value == 0);

				PUT32(slave_mailbox1_addr, 0);
			}
			if (port_number == 4)
			{
				if (cflag)
					per_port_pkts = packet_num/2;
				else
					per_port_pkts = packet_num/4;
			}
			else
				per_port_pkts = packet_num;

			
			if ((flag == ERROR) || (stop == 1))
			{
			    break;
			}
				
	    }  // end of while loop_count 

	    eprintf("\n");
		if ((flag == OK) || (txok))
		{

			switch(port_number)
			{
				case 0 : 
				case 1 : 
				case 2 : 
				case 3 : 
						eprintf("\nTransmitted on port %d: %d\n", port_number,packet_num);
						break;
    
				case 4 : // all ports 
						if (!cflag)
							eprintf("\nTransmitted on ports 0-3 : %d\n", packet_num/4);
						else
							eprintf("\nTransmitted on ports 0 and 2 : %d\n", packet_num/2);
						break;
			}
		}

		if (flag == ERROR)
			flag = OK;

		if (flag == OK)
		{
			ctr = 0;
			do	// Wait for a signal from the slave for indication of completion of test
			{
				if (ctr == 900000)	// After 3 seconds
				{
					mailbox_value = SLAVE_MAILBOX0_NO_SIG;
					flag = ERROR;
					break;
				}

				// Poll on slave's MAILBOX1 to check if packet was received by slave
#ifdef __ARMEB__
				mailbox_value = SWAP32(GET32(slave_mailbox0_addr));
#else
				mailbox_value = GET32(slave_mailbox0_addr);
#endif
				hal_delay_us(100);
				ctr++;
			}
			while (mailbox_value == 0);
		}

		if(dcache_status != 0)	// if dcache was originally ON
		{
			dcache_on();
		}

		switch(test_param)
		{
		case 't':
				if (verify_underRun(cflag))
				{
					strcpy(syslog.desc, "\nTx FIFO Watermark test PASSED\n!");
					eprintf("\nTx FIFO Watermark test PASSED!\n");
					test_passed = 1;	
				}
				else
				{
					strcpy(syslog.desc, "\nTx FIFO Watermark test FAILED\n!");
					eprintf("\nTx FIFO Watermark test FAILED\n!");
					test_passed = 0;
				}
				break;
		case 'r':
				if (verify_flowControl(cflag))
				{
					strcpy(syslog.desc, "\nRx FIFO Watermark test PASSED\n!");
					eprintf("\nRx FIFO Watermark test PASSED\n!");
					test_passed = 1;	
				}
				else
				{
					strcpy(syslog.desc, "\nRx FIFO Watermark test FAILED\n!");
					eprintf("\nRx FIFO Watermark test FAILED\n!");
					test_passed = 0;
				}
				break;

		default: eprintf("Invalid test parameter\n");
				 return ABORT;

		}

		if (!test_passed)
		{
			if (mailbox_value == SLAVE_MAILBOX0_NO_SIG)
			{
				eprintf("No signal was received from slave NPU to indicate completion\n");
			}
			else if (mailbox_value == ERROR_PATTERN)
			{
				eprintf("The packet received was not the same as the packet transmitted\n");
			}
			else if (mailbox_value == INCORRECT_SIZE)
			{
				eprintf("The packet received was not the same size as the packet transmitted\n");
			}
			else if (mailbox_value == SLAVE_MAILBOX1_NO_SIG)
			{
				eprintf("Slave NPU did not indicate that it received a packet\n");
			}
			else if (mailbox_value == NOT_SENT)
			{
				eprintf("Master NPU did not manage to transmit a packet\n");
			}
			else if (mailbox_value == NOT_RECEIVED)
			{
				eprintf("Slave NPU did not receive a packet\n");
			}
			else if (mailbox_value == RECEIVE_ERROR)
			{
				eprintf("Slave NPU receive a packet with an error\n");
			}
			else if (mailbox_value == INIT_ERROR)
			{
				eprintf("Slave NPU could not load its microcode and init\n");
			}

			// prepare structure for dumping
			syslog.type = TYPE_ERROR;
			syslog.source_comp = MASTER_DIAG;	// Determine master/slave
			// write to syslog
			syslog_dump(&syslog, sizeof(SYSLOG_DATA));

			Set_LED("LbkF");
			slowport_code[0] = SP_XSC;
			slowport_code[1] = SP_FAIL;
			dump_slowport(slowport_code, 2, SP_NON_FATAL);
			acL->Err = ERROR;
		}
		else
		{
				Set_LED("PASS");
				slowport_code[0] = SP_XSC;
				slowport_code[1] = SP_PASS;
				dump_slowport(slowport_code, 2, SP_NON_FATAL);
		}

		Clear_All_ME();

	}
	else
	{

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