📄 appl.c
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/*
*---------------------------------------------------------------------------
*
* I N T E L P R O P R I E T A R Y
*
* COPYRIGHT (c) 2001 BY INTEL CORPORATION. ALL RIGHTS
* RESERVED. NO PART OF THIS PROGRAM OR PUBLICATION MAY
* BE REPRODUCED, TRANSMITTED, TRANSCRIBED, STORED IN A
* RETRIEVAL SYSTEM, OR TRANSLATED INTO ANY LANGUAGE OR COMPUTER
* LANGUAGE IN ANY FORM OR BY ANY MEANS, ELECTRONIC, MECHANICAL,
* MAGNETIC, OPTICAL, CHEMICAL, MANUAL, OR OTHERWISE, WITHOUT
* THE PRIOR WRITTEN PERMISSION OF :
*
* INTEL CORPORATION
*
* 2200 MISSION COLLEGE BLVD
*
* SANTA CLARA, CALIFORNIA 95052-8119
*
*---------------------------------------------------------------------------
*/
#include "common_types.h"
#include "common_def.h"
#include "common.h"
#include "diag_utils.h"
#include "diagstruct.h"
#include "misc_func.h"
#include "hal_ixdp2400.h"
#include "syslog.h"
#include "hal_intr.h"
#include "led.h"
#include "pci_diag.h"
#include "diag.h"
#define SET_BIT(bit_no) (0xFFFFFFFF & (1 << bit_no))
extern void PrintBanner(void);
extern void getCommands(void);
extern void PL_Media_Loopback_Slave(void);
extern void Slave_pl_SysLpbk_test(int param);
void PL_Media_Loopback_Slave2(void);
void Doorbell_Intr_Received(void);
void DiagStructInit(void);
void install_other_isr(void);
void Set_Pci_Doorbell(int bit_num, int db_intr_addr);
static int Get_CPU_Speed(void);
static int Get_CPU_Rev(void);
static int Get_SRAM_Size(void);
static int Get_SDRAM_Size(void);
static int Get_Host_Type(void);
volatile UINT32 t_all_verbose = MAXIMUM;
extern UINT32 sram_size[2];
int Test_Mngr(void)
{
Enable_CPSR_Int();
if((get_CP15() & DCACHE_BIT) == 0) // if dcache OFF
dcache_on();
DiagStructInit();
Set_LED("PTLN");
PrintBanner();
while (1)
{
getCommands();
}
return 1;
}
//
// Function: Diag_Struct_Init
//
// Description: Initializes the struct with values that will be used
// by other functions
//
void DiagStructInit(void)
{
//This function initializes the main structure of diagnostics.
register PDiagCommon acL = (PDiagCommon) ACADDRESS;
//Setup the Diag common structure with default values.
acL->tFlag[TFLAG_SRAM] = 1;
acL->tFlag[TFLAG_SDRAM] = 1; /* do the T ALL SDRAM test */
acL->tFlag[TFLAG_UENG] = 1; /* do the T ALL UENG test */
acL->tFlag[TFLAG_TIMERS] = 1; /* do the T ALL TIMERS test */
acL->tFlag[TFLAG_ENET] = 1; /* do the T ALL ENET test */
acL->tFlag[TFLAG_PCI] = 1; /* do the T ALL PCI test */
acL->tFlag[TFLAG_XSCALE] = 1; /* do the T ALL XSCALE test */
acL->tFlag[TFLAG_I2C] = 0;
acL->tFlag[TFLAG_GPIO] = 0;
acL->tFlag[TFLAG_LED] = 1; /* do the T ALL LED test */
acL->tFlag[TFLAG_UART] = 0; /* do the T ALL UART test */
acL->tFlag[TFLAG_SF] = 0; /* do the T ALL SF test */
acL->tFlag[TFLAG_LOOPBACK] = 0; /* do the T ALL LOOPBACK test */
acL->tFlag[TFLAG_TMON] = 0;
acL->tFlag[TFLAG_FLASH] = 0;
acL->tFlag[TFLAG_LINERATE] = 0;
acL->display_verbose = MINIMAL;
acL->targetName = (char*) "IXD2410";
acL->targetCpu = (char*) "IXP2400";
acL->SDRAMSize = Get_SDRAM_Size();
acL->SRAMSize = Get_SRAM_Size();
acL->CPURevision = Get_CPU_Rev();/* set revision before speed! */
acL->CPUSpeed = Get_CPU_Speed();
acL->HostType = Get_Host_Type(); // Master/Slave
acL->UStoreSize = 4096;
acL->defAddress = 0; /* no default address yet */
acL->Verboselevel = LOG_OFF;
acL->HaltOnError = ENABLED;
acL->Err = OK;
}
//
// Function: Get_CPU_Speed
//
// Description: Reads M_CLK and N_CLK and calculate CPU Speed
//
static int Get_CPU_Speed(void)
{
// This function will return the speed of NPU in Hz.
int M_clk = 0;
int N_clk, temp;
int denom_array[] = {2, 4, 8, 16, 1, 2, 4, 8};
if(((GET32(CPLD_REV_REG)>>4) & 0xF) >= 4) // if board rev is 4 and up
{
temp = *(SYS_CLK_M_REG);
M_clk = (temp & (0xFF)) * 2;
temp = *(SYS_CLK_N_REG);
N_clk = denom_array[(temp & 0x7)];
temp = 6 * ((3125000 * M_clk)/N_clk); // in Hz
}
else
temp = (600 * 1000000); // in hz
return (temp);
}
//
// Function: Get_CPU_Rev
//
// Description: Reads PRODUCT_ID register to obtain the CPU Rev
//
static int Get_CPU_Rev(void)
{
// This function will return the NPU revision.
// It will read the PRODUCT_ID register and return the value to caller.
// PRODUCT_ID's offset is zero from GLOBAL_CONTROL_BASE
int cpu_rev = 0xFF & GET32(GLOBAL_CONTROL_BASE);
return (cpu_rev);
}
//
// Function: Get_SRAM_size
//
// Description: grabs the sram size from BIC
//
static int Get_SRAM_Size(void)
{
return (sram_size[0] + sram_size[1]);
}
//
// Function: Get_SDRAM_size
//
// Description: Reads number of module rows and density of each row on module
// from the DRAM I2C PROM. Then, calculates the size of DRAM.
//
static int Get_SDRAM_Size(void)
{
extern UINT32 hal_dram_size; // calculated in BIC and stored
return (hal_dram_size);
}
//
// Function: Get_Host_Type
//
// Description: Determines if current NPU is master or slave
//
static int Get_Host_Type(void)
{
if(GET32(STRAP_OPTIONS) & CFG_PCI_BOOT_HOST) // if master NPU
return MASTER;
else
return SLAVE;
}
void install_other_isr(void)
{
HAL_INTERRUPT_ATTACH(HAL_INTERRUPT_PCI_DBELL, &Doorbell_Intr_Received,
HAL_INTERRUPT_PCI_DBELL, 0);
HAL_INTERRUPT_UNMASK(HAL_INTERRUPT_PCI_DBELL);
}
// Function: void Doorbell_Intr_Received(void)
//
// This routine is initiated when a doorbell interrupt is received
//
// Inputs: NONE
//
// Outputs: NONE
//
void Doorbell_Intr_Received(void)
{
int temp, ctr, doorbell_reg_value, intr_no;
// PUT32(IRQ_ENABLE_CLR_REG, PCI_DOORBELL); // temporarily disable IRQ pci doorbell interrupt
intr_no = -1;
//eprintf("MAC: TAKE ME OUT\n");
doorbell_reg_value = GET32(PCI_LOCAL_CSR_BASE + XSCALE_DOORBELL_OFF); // Read the XSCALE_DOORBELL register
// eprintf("DEBUG:doorbell_reg_value = 0x%X\n", doorbell_reg_value);
// This for assumes that there is only one interrupt, as diagnostics is a controlled environment
// So after finding one interrupt, it exits the 'for' loop
for (ctr = 0; ctr < 32; ctr++) // Check each bit of the register
{
// Check if the bit is a '0'. If '0', that is the interrupt
if (((doorbell_reg_value >> ctr) & 1) == 0)
{
intr_no = ctr;
// Write a '1' to reset the bit which caused the interrupt
temp = (1 << intr_no);
PUT32((PCI_LOCAL_CSR_BASE + XSCALE_DOORBELL_OFF), temp);
break;
}
}
if (intr_no != -1)
{
switch (intr_no)
{
case PTLONE_MEDIA_LPBK :
PL_Media_Loopback_Slave();
break;
case PTLONE_MPHY_LPBK :
Slave_pl_SysLpbk_test(1);
break;
case PTLONE_SYS_LPBK :
Slave_pl_SysLpbk_test(0);
break;
case PTLONE_SYS_LPBK2:
PL_Media_Loopback_Slave2();
break;
}
}
// PUT32(IRQ_ENABLE_SET_REG, PCI_DOORBELL); // enable FIQ pci doorbell interrupt
}
// Function: void Set_Pci_Doorbell(int bit_num, int db_intr_addr)
//
// This function when called will set the specified bit of the doorbell interrupt register
// of the other NPU
//
// Inputs: bit_num = the bit number on the doorbell register to set
// db_intr_addr = the address of the other NPU's XScale Doorbell
// register (as seen over PCI)
//
// Outputs: NONE
//
void Set_Pci_Doorbell(int bit_num, int db_intr_addr)
{
int temp;
// Write a '1' to the selected bit of the PCI_DOORBELL register
// to initiate a doorbell interrupt
temp = SET_BIT(bit_num);
#ifdef __ARMEB__
temp = SWAP32(temp);
#endif
PUT32(db_intr_addr, temp);
}
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