mac_diag.c

开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测

				break;
			case REG_WR:
				spConfig();
				/*** read vallejo registers ***/
		        eprintf("\nEnter Vallejo Reg. offset :");
				for (i=0;i<=4;i++)
					saddr[i] = '\0';
				i=0;
				gets(saddr, 4);
				eprintf("\nEnter Value :");
				gets(sval, 9);
				address = htoi(saddr);
				value = htoi(sval);

				reg_write(address,value);
				eprintf("writing offset 0x%x, value = 0x%x\n",address,value);

				strcpy(saddr,"00000");
				strcpy(sval,"000000000");
				spRestore();	
				break;
		} /* end of switch */
	
		/* reset the mac test flag */
        mac_test_flag = 0;
	    return DONE;
    }

UINT32 validate_params()
{
	short fault=0;
	
	if ((loopback_mode != 'i') && (loopback_mode != 'e'))
	{
		eprintf("setting loopback mode to internal..\n");
		loopback_mode = 'i';
	}
	

	switch(channel)
	{
		case 'f':
					if (dplx == 'h')
					{
						eprintf("Half duplex mode not supported on fiber channels.\n");
						fault = 1;
					}
					else if (dplx != 'f')
					{
						eprintf("Invalid duplex mode. \n");
						fault = 1;
					}
					if (speed != 1000)
					{
						eprintf("Invalid speed parameter for fiber channels. It should be 1000.\n");
						fault = 1;
					}
					break;

		case 'c':
					if ((dplx != 'f') && (dplx != 'h'))
					{
						eprintf("Invalid duplex selected for copper channels..\n");
						fault = 1;
					}

					if ((speed != 10) && (speed != 100) && (speed != 1000))
					{
						eprintf("Invalid speed selected for copper channels\n");
						fault = 1;
					}
					if ((speed == 1000) && (dplx == 'h'))
					{
						eprintf("Half duplex operation at gigabit speeds is not supported. \n");
						fault = 1;
					}
					break;

		case 'm':	if (dplx != 'f')
					{
						eprintf("Full duplex only in mixed mode\n");
						fault = 1;
					}

					if (speed != 1000)
					{
						eprintf("Speed has to be 1000 for mixed mode\n");
						fault = 1;
					}

					if (loopback_mode != 'e')
					{
						eprintf("Loopback mode has to be set to external for mixed mode\n");
						fault = 1;
					}

					if (ports != 4)
					{
						eprintf("Four ports are required for mixed mode\n");
						fault = 1;
					}
					break;

		default:
					eprintf("Invalid Channel Mode\n");
					show_options_help();
					fault = 1;
					break;
	}

	if (fault)
		return INVALID_PARAMETERS;

	if ((ports < 0) || (ports > 4))
	{
		eprintf("Invalid port number\n");
		eprintf("Test will be executed on all 4 ports \n");
		ports = 4;
	}

	if (loop == 0)
	{
		eprintf("Loopback test executed for infinite packets..\n");
		eprintf("Please press a key to stop test ..\n");
	}
	return 0;
}
					
short check_autoneg_status(void)
{
	short s_PortCount = 0, ctr = 0, done = 0;
	UINT32 regval = 0, link=0,receiver_status=0, autoneg_complete=0;
	UINT32 auto_neg_complete_status = ERROR;
	
	eprintf("Waiting for auto-negotiation to complete ....\n");
	for(s_PortCount=0; s_PortCount<4; s_PortCount++)
    {		
		if ((s_PortCount == ports) || (ports == 4))
		{
			do
			{	
				switch(speed)
				{
				case 1000:
						regval = gbe_mac_phy_read(s_PortCount,0xA);
						link = gbe_mac_phy_read(s_PortCount,0x11);
						link = (link >> 12) & 0x1;
						receiver_status = (regval >> 12) & 0x3;
						//eprintf("receiver status = 0x%x\n",receiver_status);
						if (receiver_status == 0x3)
							done = 1;
						break;
				case 100:
						//regval = gbe_mac_phy_read(s_PortCount,0xA);
						link = gbe_mac_phy_read(s_PortCount,0x01);
						link = (link >>2) & 1;
						done = 1;
						break;
				case 10:
						//regval = gbe_mac_phy_read(s_PortCount,0xA);
						link = gbe_mac_phy_read(s_PortCount,0x16);
						done = gbe_mac_phy_read(s_PortCount,0x01);
						link = (link >> 6) & 1;
						done = (done >> 2) & 1;
						break;
				}
				//eprintf("Regval for port %d  = 0x%08X\n",s_PortCount,regval);	
				//receiver_status = (regval >> 12) & 0x3;

				autoneg_complete = gbe_mac_phy_read(s_PortCount,0x1);
				if ((((autoneg_complete >> 5) & 1) == 0x1) && (link == 1) && done)
				{
					auto_neg_complete_status = OK;
					break;
				}
				else
				{	
					ctr ++;
					auto_neg_complete_status = ERROR;
				}
			}while (ctr < 200);

			if (auto_neg_complete_status == ERROR)
			{
				if (loopback_mode == 'e')
				{
					eprintf("Auto-negotiation failed for port %d , link = 0x%08X, auto = 0x%08X\n",s_PortCount,link, autoneg_complete);
				}
			}
		}
	}

	return auto_neg_complete_status;
}


UINT32 cu_init(UINT32 set_int_lpbk)
{
	int port;
	
	if(!set_int_lpbk)
	{
		/** configure PHY registers **/
		if (config_phy() == ABORT)
			return ABORT;
	}
	else
	{
		config_phy_for_line_lpbk();
	}

   /* apply reset to MAC device */
    mac_reset_config();

	reg_write(PORT_ENABLE,0x0);

	reg_write(SERDES_CLKMODE_REG,0x0);
	reg_write(SERDES_CLKMODE_REG,0xf);

    reg_write(0x505,0xf);
	reg_write(0x505,0x0);

	reg_write(PORT_ENABLE,0x0);

	reg_write(SERDES_CLKMODE_REG,0x0);
	reg_write(INTERFACE_MODE,0xF);		/** enable copper mode **/
	switch(dplx)
	{
		case 'h' :      
				reg_write(DESIRED_DUPLEX,0x0);
				reg_write(DESIRED_DUPLEX+INDEX_PORT1,0x0);
				reg_write(DESIRED_DUPLEX+INDEX_PORT2,0x0);
				reg_write(DESIRED_DUPLEX+INDEX_PORT3,0x0);
				break;
		case 'f' :
				reg_write(DESIRED_DUPLEX,0x1);
				reg_write(DESIRED_DUPLEX+INDEX_PORT1,0x1);
				reg_write(DESIRED_DUPLEX+INDEX_PORT2,0x1);
				reg_write(DESIRED_DUPLEX+INDEX_PORT3,0x1);
				break;
		default : 
				eprintf("Illegal duplex optinon.\n");
				eprintf("The opertation will be full duplex..\n");
				break;
	}			
	
	reg_write(SERDES_CLKMODE_REG,0xF);
	reg_write(SPI3_TX_GLOBAL_CONFIG,0x20aa0f); 
	reg_write(SPI3_RX_CONFIG, 0xAA0F80);

	reg_write(DIV_CONFIG_WORD,0x114D);  
	reg_write(DIV_CONFIG_WORD+INDEX_PORT1,0x114D);  
	reg_write(DIV_CONFIG_WORD+INDEX_PORT2,0x114D);  
	reg_write(DIV_CONFIG_WORD+INDEX_PORT3,0x114D); 

	/* Pause control not to be disabled */
	/*
	reg_write(FC_MODE,0);  
	reg_write(FC_MODE+INDEX_PORT1,0);  
	reg_write(FC_MODE+INDEX_PORT2,0);  
	reg_write(FC_MODE+INDEX_PORT3,0); 
	*/
	reg_write(0x5B3,0xF0);

	reg_write(SERDES_CLKMODE_REG,0x0);
	if (speed == 100)
	{
	    reg_write(MAC_IF_MODE,0x5);  
	    reg_write(MAC_IF_MODE+INDEX_PORT1,0x5);  
	    reg_write(MAC_IF_MODE+INDEX_PORT2,0x5);  
	    reg_write(MAC_IF_MODE+INDEX_PORT3,0x5);  
	}

	if (speed == 10)
	{
	    reg_write(MAC_IF_MODE,0x4);  
	    reg_write(MAC_IF_MODE+INDEX_PORT1,0x4);  
	    reg_write(MAC_IF_MODE+INDEX_PORT2,0x4);  
	    reg_write(MAC_IF_MODE+INDEX_PORT3,0x4);  
	}
	
	if (speed == 1000)
	{
	    reg_write(MAC_IF_MODE,0x6);  
	    reg_write(MAC_IF_MODE+INDEX_PORT1,0x6);  
	    reg_write(MAC_IF_MODE+INDEX_PORT2,0x6);  
	    reg_write(MAC_IF_MODE+INDEX_PORT3,0x6);  
	}
	reg_write(SERDES_CLKMODE_REG,0xF);
    reg_write(0x505,0xf);
	reg_write(0x505,0x0);

	reg_write(TXFIFO_PAD_ENB,0xAAAA);  
	reg_write(SERDES_TX_RX_POW_DOWN,0x0); 

	mac_config();
	reg_write(GBIC_CTRL_REG,0x1C00);    

	reg_write(LED_MODE, 0x3);

	// Activate units
	reg_write(0x505, 0x0);		// MAC Soft reset 
	reg_write(0x506, 0x0);		// MDIO Reset
	reg_write(0x620, 0x0);		// TX FIFO Reset
	reg_write(0x59E, 0x0);		// Rx FIFO Reset

	//mac_disable_reset();

	reg_write(SERDES_CLKMODE_REG,0x0);
	reg_write(SERDES_CLKMODE_REG,0xf);
    reg_write(0x505,0xf);
	reg_write(0x505,0x0);
	reg_write(PORT_ENABLE,0xF);

	// fix for CRC error @ 1G
	for(port = 0; port < 4; port++)
    {
        gbe_mac_phy_write(port, 22, 0x2018);
		gbe_mac_phy_write(port, 24, 0x3248);
    }
	return DONE;
}