bdw.h

开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测

/*
 *---------------------------------------------------------------------------
 *                                                                      
 *                  I N T E L   P R O P R I E T A R Y                   
 *                                                                      
 *     COPYRIGHT (c)  2001 BY  INTEL  CORPORATION.  ALL RIGHTS          
 *     RESERVED.   NO  PART  OF THIS PROGRAM  OR  PUBLICATION  MAY      
 *     BE  REPRODUCED,   TRANSMITTED,   TRANSCRIBED,   STORED  IN  A    
 *     RETRIEVAL SYSTEM, OR TRANSLATED INTO ANY LANGUAGE OR COMPUTER    
 *     LANGUAGE IN ANY FORM OR BY ANY MEANS, ELECTRONIC, MECHANICAL,    
 *     MAGNETIC,  OPTICAL,  CHEMICAL, MANUAL, OR OTHERWISE,  WITHOUT    
 *     THE PRIOR WRITTEN PERMISSION OF :                                
 *                                                                      
 *                        INTEL  CORPORATION                            
 *                                                                     
 *                     2200 MISSION COLLEGE BLVD                        
 *                                                                      
 *               SANTA  CLARA,  CALIFORNIA  95052-8119                  
 *                                                                      
 *---------------------------------------------------------------------------
 *
 *
 *   AUTHOR:         $Author: lagarwal $
 *   DATE:           $Date: 2003/07/29 21:25:10 $
 *   LAST MODIFIED:  $Modtime: 5/18/02 12:09p $
 *   REV#:           $Revision: 1.4 $
 *   LOGFILE:        $Logfile: /Embedded/source/linecards/batteryDW/bdw.h $
 *   WORKFILE:       $Workfile: bdw.h $
 *
 * --------------------------------------------------------------------------
 * Project: ALL
 *
 * Purpose: Defines general macros and data structures for the socket server.
 *
 * Notes:
 *			
 * --------------------------------------------------------------------------
 * CompilerFlags: 
 * --------------------------------------------------------------------------
 * --------------------------------------------------------------------------
 *   $Log:
 * --------------------------------------------------------------------------
 */ 

#ifndef __BDW_H_
#define __BDW_H_

#define BATTETY_DREW_CARD       "BD"
#define BATTETY_WALLACE_CARD    "BW"
#define PRBS_MODE               0xFFFC
#define IXF6048_BASE_ADDRESS    0xc6000000
#define IXF6048_BASE_ADDRESS_M	IXF6048_BASE_ADDRESS
#define IXF6048_BASE_ADDRESS_S	0xc6800000
#define REG_SHIFT 1
#define IXF6048_REG(reg)	(IXF6048_BASE_ADDRESS + (reg << REG_SHIFT))
#define IXF6048_REG_VAL(reg)	((READ_FROM_HW((bb_RegPointer_type)(IXF6048_BASE_ADDRESS + (reg << REG_SHIFT)))) & 0xFFFF)

#define MAX_CHARS 256


#define LOG_SIZE (128 * 1024) /*Log Size */
#define CNT_BLOCK_SIZE 0x20 /*control block size */
#define FLASH_BASE_ADDR 0xc0000000 /*Flash base address after unaliasing it */
#define LOG_START_ADDR (FLASH_BASE_ADDR + 0xFC0000) /* Second last 128 K byte block of flash*/
#define FIRST_ENTRY (LOG_START_ADDR + CNT_BLOCK_SIZE)
//#define SYSLOG_ENTRY_SIZE 0x20
#define INVALID_PARAMETER 1
#define LOGGING_OFF 2
#define INAPPROPRIATE_LEVEL 3
#define SUCCESS 0
#define FAILURE 1

#define CFG_MAN_ID_LEN        12    /*bytes*/
#define CFG_MODEL_ID_LEN      12    /*bytes*/
#define CFG_PARTNUM_LEN       10    /*bytes*/
#define CFG_PARTREV_LEN        2    /*bytes*/
#define CFG_SERIAL_NUM_LEN    10    /*bytes*/
#define CFG_DATE_LEN           8    /*bytes*/
#define CFG_PASSWD_LEN         8    /*bytes*/
#define CFG_CHKSUM_LEN         4    /*bytes*/

/*
//typedef enum {ERROR = 0, WARNING, DEBUG1, DEBUG2, DEBUG3} log_level;
//int current_logging = LOG_OFF;
//int current_logging_level = ERROR;
*/
/* global variables for getCmdLine */
#define BACKSPACE '\b'    /* make it delete for now...*/
#define CMD_LINE_LENGTH 127
#define CMD_BUF_SIZE 16


#define MASTER_BATTERY_DIAG 12
#define OS_TASK_SLEEP(sec)  (hal_delay_us(sec*1000000))

/* defines for generating packets */
#define DRAM_BASE           0x0     /* TBD Put actual value */
#define	TEST_PKT_OFFSET 	0x800	/*TBD offset into sdram where pkt lib starts (bytes)*/
#define	TEST_PKT_SZ     	64		/*length of test pkt (bytes)*/
#define	TEST_PKT_SZ_QW	    (TEST_PKT_SZ/8)   /*length of test pkt (qwords)*/
#define	TEST_PKT_QTY	    25			      /*number of unique pkts in pkt lib*/
#define	TEST_PKT_BASE	    (DRAM_BASE + TEST_PKT_OFFSET)
#define	TEST_PKT_LIB_SZ	    (TEST_PKT_SZ * TEST_PKT_QTY)
#define	TEST_PKT_END	    (TEST_PKT_BASE + TEST_PKT_LIB_SZ)
#define	TEST_DATA_INC        1
#define	TEST_DATA_DEC        0x10000
#define	TEST_DATA_SEED       0xFFFF0000


#define BDW_CCR 	0xc0080000
#define BDW_WTC2 	0xc0080008
#define BDW_RTC2 	0xc0080010
#define BDW_PCR 	0xc0080018
#define BDW_ADC	0xc008001c
#define BDW_FAC	0xc0080020

#define BDW_ALL_FIXED_TIME 10

typedef unsigned short* RegPointer_t;

typedef struct {
	unsigned int addr;
	unsigned short val;
} IXF6048InitStruct;

typedef enum
{
   BDW_FAIL,
   BDW_SUCCESS,
   BDW_INVALID_CHANNEL,
   BDW_UNKNOWN_MEDIA_CARD,
   BDW_PRBS_INVALID_MODE,
   BDW_PRBS_TEST_NOT_STARTED,
   BDW_PRBS_TESTED_ENDED_IN_ERROR,
   BDW_PRBS_TEST_ALREADY_RUNNING,
} BDW_Status_t;

typedef enum 
{
    INTERNAL,
    EXTERNAL
} LoopBackMode_t;

/* Defines the different types of payloads */
typedef enum 
{
    ATM,
    POS,
    TRANSPARENT,
    PRBS
} PayloadTypes_t;

/* Defines the different system configurations */
typedef enum
{
    UTOPIA_NONE,
    UTOPIA3_64,
    UTOPIA3_32,
    UTOPIA3_4x8,
    UTOPIA2_1x16,
    UTOPIA2_1x8,
    UTOPIA1_4x8,
    UTOPIA1_4x16
} Utopia_Cnfg_t;

/* Defines the side of chip */
typedef enum
{
    BDW_TX,
    BDW_RX
} Side_t;

typedef enum
{
    OC12_MODE,
    OC48_MODE,
}ChannelMode_t;

typedef enum   /* Specifies Chip or Channel Reset */
{  
   bdw_RESET_CHIP =  10,        /* Reset entire chip; then reconfig chip */
                                /* Starting from 10 so not to overlap legacy code */
   bdw_RESET_RX_CHAN,           /* Reset Rx side of Channel; then recfg Rx Side */
   bdw_RESET_TX_CHAN,           /* Reset Tx side of Channel; then recfg Tx Side */
   bdw_RESET_CHAN,              /* Reset Channel */
   bdw_RESET_RL_MSA_FIFO,       /* Reset the receive FIFO */
   bdw_RESET_TT_MSA_FIFO,       /* Reset the transmit FIFO */
} ResetType_t;



typedef struct MEDIA_EEPROM_CONTENT 
{
	unsigned char	prom_fmt; //1
    unsigned char	dev_id;  //1
	unsigned char	man_id[12]; //[CFG_MAN_ID_LEN]; //12
	unsigned char	part_rev [2];//[CFG_PARTREV_LEN]; //2
	
	unsigned char	part_num[10]; //[CFG_PARTNUM_LEN]; //10
	unsigned char	serial_num[10]; //[CFG_SERIAL_NUM_LEN]; //10
	unsigned char	model_id[12]; //[CFG_MODEL_ID_LEN]; //12

	unsigned char	rsvd1[8]; //[CFG_RSVD1_LEN]; //8
	unsigned char	passwd[8]; //[CFG_PASSWD_LEN]; //8
	
	unsigned char	test_status;	//1
	unsigned char	date[8]; //[CFG_DATE_LEN]; //8
	unsigned char	chksum[4]; //[CFG_CHKSUM_LEN]; //4
	unsigned char	rsvd2[3]; //[CFG_RSVD2_LEN]; //3

} I2Cstruct_t;

typedef struct _eduCommon 
{
    /* This definition of DiagCommon MUST be at the top of 
       this _eduCommon structure.  It is intended to overlap
       the Main TestMgr. */
    DiagCommon dc;
    
    /* I2C Data */
    I2Cstruct_t i2cData;       /* Pointer to I2C data */
    
    /* PRBS data */
    int prbsChanNum;          /* PRBS channel number */
    void* chipId;
} eduCommon;


#endif