📄 btables.h
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/*
*---------------------------------------------------------------------------
*
* I N T E L P R O P R I E T A R Y
*
* COPYRIGHT (c) 2001 BY INTEL CORPORATION. ALL RIGHTS
* RESERVED. NO PART OF THIS PROGRAM OR PUBLICATION MAY
* BE REPRODUCED, TRANSMITTED, TRANSCRIBED, STORED IN A
* RETRIEVAL SYSTEM, OR TRANSLATED INTO ANY LANGUAGE OR COMPUTER
* LANGUAGE IN ANY FORM OR BY ANY MEANS, ELECTRONIC, MECHANICAL,
* MAGNETIC, OPTICAL, CHEMICAL, MANUAL, OR OTHERWISE, WITHOUT
* THE PRIOR WRITTEN PERMISSION OF :
*
* INTEL CORPORATION
*
* 2200 MISSION COLLEGE BLVD
*
* SANTA CLARA, CALIFORNIA 95052-8119
*
*---------------------------------------------------------------------------
*
*
* AUTHOR: $Author: lagarwal $
* DATE: $Date: 2003/01/29 00:22:07 $
* LAST MODIFIED: $Modtime: 5/20/02 2:31p $
* REV#: $Revision: 1.2 $
* LOGFILE: $Logfile: /Embedded/source/linecards/batteryDW/btables.h $
* WORKFILE: $Workfile: btables.h $
*
* --------------------------------------------------------------------------
* Project: ALL
*
* Purpose:
*
* Notes:
*
* --------------------------------------------------------------------------
* CompilerFlags:
* --------------------------------------------------------------------------
* --------------------------------------------------------------------------
* $Log:
* --------------------------------------------------------------------------
*/
#ifndef __BTABLES_H_
#define __BTABLES_H_
static const InitRegTable_t defaultArray[] =
{
{ (bb_RegPointer_type)(CHIP_ID) , 0x0201},
{ (bb_RegPointer_type)(GOCNF) , 0x0020},
{ (bb_RegPointer_type)(COCNF(0)) , 0x0007},
{ (bb_RegPointer_type)(R_COCNF(0)) , 0x00F2},
{ (bb_RegPointer_type)(T_COCNF(0)) , 0x07F2},
{ (bb_RegPointer_type)(R_FPCNF) , 0x0030},
{ (bb_RegPointer_type)(T_FPCNF) , 0x3030},
{ (bb_RegPointer_type)(R_UICNF) , 0x0024},
{ (bb_RegPointer_type)(R_UIIML) , 0x0002},
{ (bb_RegPointer_type)(R_UICHCNF(0)) , 0x0119},
{ (bb_RegPointer_type)(R_PWM(0)) , 0x000F},
{ (bb_RegPointer_type)(T_UICNF) , 0x0024},
{ (bb_RegPointer_type)(T_UIIML) , 0x0002},
{ (bb_RegPointer_type)(T_UICHCNF(0)) , 0x0119},
{ (bb_RegPointer_type)(T_UIFDP(0)) , 0x00FF},
{ (bb_RegPointer_type)(T_NFPWM(0)) , 0x001F},
{ (bb_RegPointer_type)(T_NEWWM(0)) , 0x00FF},
{ (bb_RegPointer_type)(R_RSTC(0)) , 0x8100},
{ (bb_RegPointer_type)(J0_RSTC(0)) , 0x0002},
{ (bb_RegPointer_type)(R_MST_C(0)) , 0x0500},
{ (bb_RegPointer_type)(CWIN_SB2(0)) , 0x0003},
{ (bb_RegPointer_type)(E_EXCWIN(0)) , 0x002B},
{ (bb_RegPointer_type)(CWIN_CB2(0)) , 0x0003},
{ (bb_RegPointer_type)(E_NEXCWIN_CB2(0)) , 0x0008},
{ (bb_RegPointer_type)(CWIN_SDEGB2(0)) , 0x0003},
{ (bb_RegPointer_type)(E_DEGWIN(0)) , 0x002B},
{ (bb_RegPointer_type)(CWIN_CDEGB2(0)) , 0x0003},
{ (bb_RegPointer_type)(E_NDEGWIN_CB2(0)) , 0x0008},
{ (bb_RegPointer_type)(R_HPT_C1(0)) , 0x60FC},
{ (bb_RegPointer_type)(R_HPT_C2(0)) , 0x0200},
{ (bb_RegPointer_type)(EXP_C2(0)) , 0x0001},
{ (bb_RegPointer_type)(T_RMST_OP(0)) , 0x8040},
{ (bb_RegPointer_type)(T_SC_RSOH(0)) , 0x0124},
{ (bb_RegPointer_type)(T_SC_MSOH(0)) , 0x000A},
{ (bb_RegPointer_type)(T_HPT_C(0)) , 0x0140},
{ (bb_RegPointer_type)(T_HPT_OPC(0)) , 0x0610},
{ (bb_RegPointer_type)(MP_TC2(0)) , 0x0001},
/* { (bb_RegPointer_type)(R_ACPCNF(0)) , 0x0183}, */
{ (bb_RegPointer_type)(R_IUCFLTR(0)) , 0xFF01},
{ (bb_RegPointer_type)(R_LCDFLTR_LO(0)) , 0x2FC0},
{ (bb_RegPointer_type)(R_LCDFLTR_HI(0)) , 0x0001},
{ (bb_RegPointer_type)(T_ACPCNF(0)) , 0x0023},
{ (bb_RegPointer_type)(T_ICELLP(0)) , 0x6A01},
{ (bb_RegPointer_type)(R_PHCCNF(0)) , 0x006F},
{ (bb_RegPointer_type)(R_MINPL(0)) , 0x0002},
{ (bb_RegPointer_type)(R_MAXPL(0)) , 0x0600},
{ (bb_RegPointer_type)(T_PHCCNF(0)) , 0x004F},
{ (bb_RegPointer_type)(T_IPGCTRL(0)) , 0x0401},
{ (bb_RegPointer_type) 0xFFFF, 0xA5A5 }
};
#if 0
static const InitRegTable_t RegInitBatteryDrew[] =
{
/* Note: Channel applies depending of the Chip Block as:
Channel could represent the DataLine
Channel could represent the group
Channel could represent the Tributary
Channel could represent the Line */
/* IXF6048 Global Cnfg Register Block */
{ (bb_RegPointer_type) 0x0001, 0x0000 },
{ (bb_RegPointer_type) 0x0003, 0x0000 },
{ (bb_RegPointer_type) 0x0004, 0x0000 },
{ (bb_RegPointer_type) 0x0008, 0x0038 },
{ (bb_RegPointer_type) 0x000C, 0x0000 },
{ (bb_RegPointer_type) 0x000D, 0x0030 },
{ (bb_RegPointer_type) 0x000E, 0x3030 },
{ (bb_RegPointer_type) 0x000F, 0x0001 },
{ (bb_RegPointer_type) 0x0010, 0x0000 },
{ (bb_RegPointer_type) 0x0011, 0x0000 },
{ (bb_RegPointer_type) 0x0014, 0x0000 },
{ (bb_RegPointer_type) 0x0015, 0x0000 },
{ (bb_RegPointer_type) 0x001E, 0x0000 },
{ (bb_RegPointer_type) 0x001B, 0x0000 },
{ (bb_RegPointer_type) 0x001D, 0x0000 },
{ (bb_RegPointer_type) 0x0020, 0x0000 },
/* IXF6048 Channel Confg Register Block Channel = 0 */
{ (bb_RegPointer_type) 0x0009, 0x0007 },
{ (bb_RegPointer_type) 0x000A, 0x01F3 },
{ (bb_RegPointer_type) 0x000B, 0x01F3 },
/* IXF6048 Channel Confg Register Block Channel = 1 */
{ (bb_RegPointer_type) 0x0109, 0x0007 },
{ (bb_RegPointer_type) 0x010A, 0x00F2 },
{ (bb_RegPointer_type) 0x010B, 0x07F2 },
/* IXF6048 Channel Confg Register Block Channel = 2 */
{ (bb_RegPointer_type) 0x0209, 0x0007 },
{ (bb_RegPointer_type) 0x020A, 0x00F2 },
{ (bb_RegPointer_type) 0x020B, 0x07F2 },
/* IXF6048 Channel Confg Register Block Channel = 3 */
{ (bb_RegPointer_type) 0x0309, 0x0007 },
{ (bb_RegPointer_type) 0x030A, 0x00F2 },
{ (bb_RegPointer_type) 0x030B, 0x07F2 },
/* IXF6048 Glb Utopia Register Block */
{ (bb_RegPointer_type) 0x0070, 0x00A5 },
{ (bb_RegPointer_type) 0x0071, 0x0002 },
{ (bb_RegPointer_type) 0x0050, 0x0024 },
{ (bb_RegPointer_type) 0x0051, 0x0002 },
{ (bb_RegPointer_type) 0x0073, 0x0000 },
{ (bb_RegPointer_type) 0x0053, 0x1010 },
/* IXF6048 Channel Utopia Register Block Channel = 0 */
{ (bb_RegPointer_type) 0x0060, 0x0319 },
{ (bb_RegPointer_type) 0x0061, 0x000F },
{ (bb_RegPointer_type) 0x0040, 0x0319 },
{ (bb_RegPointer_type) 0x0041, 0x00FF },
{ (bb_RegPointer_type) 0x0042, 0x001F },
{ (bb_RegPointer_type) 0x0043, 0x00FF },
/* IXF6048 Channel Utopia Register Block Channel = 1 */
{ (bb_RegPointer_type) 0x0160, 0x0119 },
{ (bb_RegPointer_type) 0x0161, 0x000F },
{ (bb_RegPointer_type) 0x0140, 0x0119 },
{ (bb_RegPointer_type) 0x0141, 0x001F },
{ (bb_RegPointer_type) 0x0142, 0x001F },
{ (bb_RegPointer_type) 0x0143, 0x00FF },
/* IXF6048 Channel Utopia Register Block Channel = 2 */
{ (bb_RegPointer_type) 0x0260, 0x0119 },
{ (bb_RegPointer_type) 0x0261, 0x000F },
{ (bb_RegPointer_type) 0x0240, 0x0119 },
{ (bb_RegPointer_type) 0x0241, 0x001F },
{ (bb_RegPointer_type) 0x0242, 0x001F },
{ (bb_RegPointer_type) 0x0243, 0x00FF },
/* IXF6048 Channel Utopia Register Block Channel = 3 */
{ (bb_RegPointer_type) 0x0360, 0x0119 },
{ (bb_RegPointer_type) 0x0361, 0x000F },
{ (bb_RegPointer_type) 0x0340, 0x0119 },
{ (bb_RegPointer_type) 0x0341, 0x001F },
{ (bb_RegPointer_type) 0x0342, 0x001F },
{ (bb_RegPointer_type) 0x0343, 0x00FF },
/* IXF6048 RST Register Block Channel = 0 */
{ (bb_RegPointer_type) 0x0480, 0x8000 },
{ (bb_RegPointer_type) 0x0481, 0x0000 },
{ (bb_RegPointer_type) 0x0487, 0x0002 },
{ (bb_RegPointer_type) 0x04D0, 0x030F },
{ (bb_RegPointer_type) 0x04D4, 0x0000 },
{ (bb_RegPointer_type) 0x04D8, 0x0000 },
/* IXF6048 RST Register Block Channel = 1 */
{ (bb_RegPointer_type) 0x0580, 0x8100 },
{ (bb_RegPointer_type) 0x0581, 0x0000 },
{ (bb_RegPointer_type) 0x0587, 0x0002 },
{ (bb_RegPointer_type) 0x05D0, 0x0000 },
{ (bb_RegPointer_type) 0x05D4, 0x0000 },
{ (bb_RegPointer_type) 0x05D8, 0x0000 },
/* IXF6048 RST Register Block Channel = 2 */
{ (bb_RegPointer_type) 0x0680, 0x8100 },
{ (bb_RegPointer_type) 0x0681, 0x0000 },
{ (bb_RegPointer_type) 0x0687, 0x0002 },
{ (bb_RegPointer_type) 0x06D0, 0x0000 },
{ (bb_RegPointer_type) 0x06D4, 0x0000 },
{ (bb_RegPointer_type) 0x06D8, 0x0000 },
/* IXF6048 RST Register Block Channel = 3 */
{ (bb_RegPointer_type) 0x0780, 0x8100 },
{ (bb_RegPointer_type) 0x0781, 0x0000 },
{ (bb_RegPointer_type) 0x0787, 0x0002 },
{ (bb_RegPointer_type) 0x07D0, 0x0000 },
{ (bb_RegPointer_type) 0x07D4, 0x0000 },
{ (bb_RegPointer_type) 0x07D8, 0x0000 },
/* IXF6048 MST Register Block Channel = 0 */
{ (bb_RegPointer_type) 0x0490, 0x0500 },
{ (bb_RegPointer_type) 0x04B0, 0x0000 },
{ (bb_RegPointer_type) 0x04B1, 0x0003 },
{ (bb_RegPointer_type) 0x04B2, 0x002B },
{ (bb_RegPointer_type) 0x04B3, 0x0000 },
{ (bb_RegPointer_type) 0x04B4, 0x0003 },
{ (bb_RegPointer_type) 0x04B5, 0x0008 },
{ (bb_RegPointer_type) 0x04B8, 0x0003 },
{ (bb_RegPointer_type) 0x04B9, 0x002B },
{ (bb_RegPointer_type) 0x04BC, 0x0003 },
{ (bb_RegPointer_type) 0x04BD, 0x0008 },
{ (bb_RegPointer_type) 0x04D1, 0x7FFF },
{ (bb_RegPointer_type) 0x04D5, 0x0000 },
{ (bb_RegPointer_type) 0x04D9, 0x00F2 },
/* IXF6048 MST Register Block Channel = 1 */
{ (bb_RegPointer_type) 0x0590, 0x0500 },
{ (bb_RegPointer_type) 0x05B0, 0x0000 },
{ (bb_RegPointer_type) 0x05B1, 0x0003 },
{ (bb_RegPointer_type) 0x05B2, 0x002B },
{ (bb_RegPointer_type) 0x05B3, 0x0000 },
{ (bb_RegPointer_type) 0x05B4, 0x0003 },
{ (bb_RegPointer_type) 0x05B5, 0x0008 },
{ (bb_RegPointer_type) 0x05B8, 0x0003 },
{ (bb_RegPointer_type) 0x05B9, 0x002B },
{ (bb_RegPointer_type) 0x05BC, 0x0003 },
{ (bb_RegPointer_type) 0x05BD, 0x0008 },
{ (bb_RegPointer_type) 0x05D1, 0x0000 },
{ (bb_RegPointer_type) 0x05D5, 0x0000 },
{ (bb_RegPointer_type) 0x05D9, 0x0000 },
/* IXF6048 MST Register Block Channel = 2 */
{ (bb_RegPointer_type) 0x0690, 0x0500 },
{ (bb_RegPointer_type) 0x06B0, 0x0000 },
{ (bb_RegPointer_type) 0x06B1, 0x0003 },
{ (bb_RegPointer_type) 0x06B2, 0x002B },
{ (bb_RegPointer_type) 0x06B3, 0x0000 },
{ (bb_RegPointer_type) 0x06B4, 0x0003 },
{ (bb_RegPointer_type) 0x06B5, 0x0008 },
{ (bb_RegPointer_type) 0x06B8, 0x0003 },
{ (bb_RegPointer_type) 0x06B9, 0x002B },
{ (bb_RegPointer_type) 0x06BC, 0x0003 },
{ (bb_RegPointer_type) 0x06BD, 0x0008 },
{ (bb_RegPointer_type) 0x06D1, 0x0000 },
{ (bb_RegPointer_type) 0x06D5, 0x0000 },
{ (bb_RegPointer_type) 0x06D9, 0x0000 },
/* IXF6048 MST Register Block Channel = 3 */
{ (bb_RegPointer_type) 0x0790, 0x0500 },
{ (bb_RegPointer_type) 0x07B0, 0x0000 },
{ (bb_RegPointer_type) 0x07B1, 0x0003 },
{ (bb_RegPointer_type) 0x07B2, 0x002B },
{ (bb_RegPointer_type) 0x07B3, 0x0000 },
{ (bb_RegPointer_type) 0x07B4, 0x0003 },
{ (bb_RegPointer_type) 0x07B5, 0x0008 },
{ (bb_RegPointer_type) 0x07B8, 0x0003 },
{ (bb_RegPointer_type) 0x07B9, 0x002B },
{ (bb_RegPointer_type) 0x07BC, 0x0003 },
{ (bb_RegPointer_type) 0x07BD, 0x0008 },
{ (bb_RegPointer_type) 0x07D1, 0x0000 },
{ (bb_RegPointer_type) 0x07D5, 0x0000 },
{ (bb_RegPointer_type) 0x07D9, 0x0000 },
/* IXF6048 RX MSA Register Block Channel = 0 */
{ (bb_RegPointer_type) 0x04A0, 0x0000 },
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