ether_test.h

基于ecos的redboot

#define BROADCAST		0	/* disabled */
#define CRS				0x80	/* CDT = carrier */
#define BYTE15_REQUD	0x48	/* required "1" bits */
#define CONFIG_BYTE_15	(PROM_MODE | BROADCAST | CRS | BYTE15_REQUD)

/* Byte 16 */
#define CONFIG_BYTE_16	(0x00)

/* Byte 17 */
#define CONFIG_BYTE_17	(0x40)

/* Byte 18 */
#define STRIPPING_DISABLE	0x00
#define STRIPPING_ENABLE	0x01
#define PADDING_ENABLE  	0x02
#define XFER_CRC			0x04	/* store CRC */
#define NO_XFER_CRC			0x00
#define BYTE18_REQUD		0xf0	/* required "1" bits */
#define CONFIG_BYTE_18	(NO_XFER_CRC | PADDING_ENABLE | STRIPPING_ENABLE | BYTE18_REQUD)

/* Byte 19 */
#define NO_FORCE_FDX		0x00
#define FORCE_FDX			0x40
#define FDX_PIN_ENAB		0x80
#define CONFIG_BYTE_19_10T	FORCE_FDX
#define CONFIG_BYTE_19_100T	NO_FORCE_FDX

/* Byte 20 */
#define NO_MULTI_IA	0x00
#define CONFIG_BYTE_20	(NO_MULTI_IA)

/* Byte 21 */
#define NO_MULTI_ALL	0x00
#define CONFIG_BYTE_21	(NO_MULTI_ALL)

#define SCB_S_CUMASK	0x00c0		/* state mask */
#define SCB_S_CUIDLE	(0x00 << 6)	/* CU is idle */
#define SCB_S_CUSUSP	(0x01 << 6)	/* CU is suspended */
#define SCB_S_CUACTIVE	(0x02 << 6)	/* CU is active */
#define SCB_S_CURSV1	(0x03 << 6)	/* reserved */

/*
 * 82557 structures.  NOTE: the 557 is used in 32-bit linear addressing
 * mode.  See alignment restrictions above.
 */

/* Result of PORT* self-test command - MUST be 16 byte aligned! */
struct selfTest {
	UINT32	romSig;			/* signature of rom */
	union {				/* Flag bits - as UINT32 or field */
		struct {
			UINT32	rsrv1 : 2;
			UINT32	romTest : 1;
			UINT32	regTest : 1;
			UINT32	rsrv2 : 1;
			UINT32	diagnTest : 1;
			UINT32	rsrv3 : 6;
			UINT32	selfTest : 1;
			UINT32	rsrv4 : 19;
		} bits;
		UINT32	word2;
	} u;
};

/* MDI Control Register */
typedef union
{
    struct
    {
    	UINT32 data : 16;	/* data to write or data read */
    	UINT32 regAdd : 5;	/* PHY register address */
    	UINT32 phyAdd : 5;	/* PHY address */
    	UINT32 op : 2;	/* opcode, 1 for MDI write, 2 for MDI read */
    	UINT32 ready : 1;	/* 1 = operation complete */
    	UINT32 intEnab : 1;	/* 1 = interrupt at end of cycle */
    	UINT32 rsrv : 2;	/* reserved */   
    } bits;
    UINT32 word;
} MDI_CONTROL_U;

/* Command/Status Word of SCB */
typedef union
{
    struct
    {
	UINT32	rsrv1 : 2;		/* Reserved */
	UINT32	rus : 4;		/* Receive unit status */
	UINT32	cus : 2;		/* Command unit status */
	UINT32	rsrv2 : 2;		/* Reserved */
	UINT32	statack_swi : 1;	/* Software generated int. */
	UINT32	statack_mdi : 1;	/* MDI read/write complete */
	UINT32	statack_rnr : 1;	/* RU not ready */
	UINT32	statack_cna : 1;	/* CU not active */
	UINT32	statack_fr : 1;		/* Frame reception done */
	UINT32	statack_cx_tno : 1;	/* Cmd exec completed */
	UINT32	ruc : 3;		/* Receive unit command */
	UINT32	rsrv3 : 1;		/* Reserved */
	UINT32	cuc : 3;		/* Command unit command */
	UINT32	rsrv4 : 1;		/* Reserved */
	UINT32	m : 1;			/* Interrupt mask bit */
	UINT32	si : 1;			/* Software generated int. */
	UINT32	rsrv5 : 6;		/* Reserved */
    } bits;
    struct
    {
	UINT16	status;
	UINT16	command;
    } words;
} CMD_STAT_U;

/* System command block - on chip for the 82557 */
struct SCBtype 
{
	CMD_STAT_U	cmdStat; 
	UINT32		scb_general_ptr;	/* SCB General Pointer */
};

/* Command blocks - declared as a union; some commands have different fields */
union cmdBlock {
	/* No operation */
	struct {
		UINT32	rsrv1 : 13;	/* reserved bits (set to 0) */
		UINT32	ok : 1;		/* 1 = command completed, no error */
		UINT32	rsrv2 : 1;	/* reserved bits (set to 0) */
		UINT32	c : 1;		/* 1 = command completed */
		UINT32	code : 3;	/* command code (0 = NOP) */
		UINT32	rsrv3 : 10;	/* reserved bits (set to 0) */
		UINT32	i : 1;		/* 1 = interrupt upon completion */
		UINT32	s : 1;		/* 1 = suspend CU upon completion */
		UINT32	el : 1;		/* 1 = last cmdBlock in list */
		union cmdBlock *link;	/* next block in list */
	} nop;
	/* Individual address setup */
	struct {
		UINT32	rsrv1 : 13;	/* reserved bits (set to 0) */
		UINT32	ok : 1;		/* 1 = command completed, no error */
		UINT32	rsrv2 : 1;	/* reserved bits (set to 0) */
		UINT32	c : 1;		/* 1 = command completed */
		UINT32	code : 3;	/* command code (1 = ia setup) */
		UINT32	rsrv3 : 10;	/* reserved bits (set to 0) */
		UINT32	i : 1;		/* 1 = interrupt upon completion */
		UINT32	s : 1;		/* 1 = suspend CU upon completion */
		UINT32	el : 1;		/* 1 = last cmdBlock in list */
		union cmdBlock *link;	/* next block in list */
		UINT8	enetAddr[6];	/* hardware ethernet address */
		UINT16	rsrv4;		/* padding */
	} iaSetup;
	/* Configure */
	struct {
		UINT32	rsrv1 : 13;	/* reserved bits (set to 0) */
		UINT32	ok : 1;		/* 1 = command completed, no error */
		UINT32	rsrv2 : 1;	/* reserved bits (set to 0) */
		UINT32	c : 1;		/* 1 = command completed */
		UINT32	code : 3;	/* command code (2 = configure) */
		UINT32	rsrv3 : 10;	/* reserved bits (set to 0) */
		UINT32	i : 1;		/* 1 = interrupt upon completion */
		UINT32	s : 1;		/* 1 = suspend CU upon completion */
		UINT32	el : 1;		/* 1 = last cmdBlock in list */
		union cmdBlock *link;	/* next block in list */
		UINT8	configData[20];	/* configuration data */
	} configure;
	/* Multicast address setup */
	struct {
		UINT32	rsrv1 : 13;	/* reserved bits (set to 0) */
		UINT32	ok : 1;		/* 1 = command completed, no error */
		UINT32	rsrv2 : 1;	/* reserved bits (set to 0) */
		UINT32	c : 1;		/* 1 = command completed */
		UINT32	code : 3;	/* command code (3 = mc setup) */
		UINT32	rsrv3 : 10;	/* reserved bits (set to 0) */
		UINT32	i : 1;		/* 1 = interrupt upon completion */
		UINT32	s : 1;		/* 1 = suspend CU upon completion */
		UINT32	el : 1;		/* 1 = last cmdBlock in list */
		union cmdBlock *link;	/* next block in list */
		UINT16	mcCount;	/* # of bytes in mcAddrList[] */
		UINT8	mcAddrList[6];	/* list of multicast addresses */
	} mcSetup;
	/* Transmit */
	struct {
		UINT32	rsrv1 : 12;	/* reserved bits (set to 0) */
		UINT32	u : 1;		/* 1 = underrun was encountered */
		UINT32	ok : 1;		/* 1 = command completed, no error */
		UINT32	rsrv2 : 1;	/* reserved bits (set to 0) */
		UINT32	c : 1;		/* 1 = command completed */
		UINT32	code : 3;	/* command code (4 = transmit) */
		UINT32	sf : 1;		/* 1 = flexible mode */
		UINT32	rsrv3 : 9;	/* reserved bits (set to 0) */
		UINT32	i : 1;		/* 1 = interrupt upon completion */
		UINT32	s : 1;		/* 1 = suspend CU upon completion */
		UINT32	el : 1;		/* 1 = last cmdBlock in list */
		union cmdBlock *link;	/* next block in list */
		UINT8	*tbdAddr;	/* tx buf addr; all 1s for simp mode */
		UINT32	tcbCount : 14;	/* # bytes to be tx from cmd block */
		UINT32	rsrv4 : 1;	/* reserved (set to 0) */
		UINT32	eof : 1;	/* 1 = entire frame in cmd block */
		UINT8	tx_threshold;	/* # of bytes in FIFO before xmission */
		UINT8	tbd_number;	/* # of tx. buffers in TBD array */
		UINT8	destAddr[6];	/* destination hardware address */
		UINT16	length;		/* 802.3 packet length (from packet) */
		UINT8	txData[ETHERMTU];	/* optional data to tx */
	} transmit;
	/* Dump 82557 registers */
	struct {
		UINT32	rsrv1 : 13;	/* reserved bits (set to 0) */
		UINT32	ok : 1;		/* 1 = command completed, no error */
		UINT32	rsrv2 : 1;	/* reserved bits (set to 0) */
		UINT32	c : 1;		/* 1 = command completed */
		UINT32	code : 3;	/* command code (6 = dump) */
		UINT32	rsrv3 : 10;	/* reserved bits (set to 0) */
		UINT32	i : 1;		/* 1 = interrupt upon completion */
		UINT32	s : 1;		/* 1 = suspend CU upon completion */
		UINT32	el : 1;		/* 1 = last cmdBlock in list */
		union cmdBlock *link;	/* next block in list */
		UINT8	*bufAddr;	/* where to dump registers */
	} dump;
	/* Diagnose - perform self test */
	struct {
		UINT32	rsrv1 : 11;	/* reserved bits (set to 0) */
		UINT32	f : 1;		/* 1 = self test failed */
		UINT32	rsrv2 : 1;	/* reserved bits (set to 0) */
		UINT32	ok : 1;		/* 1 = command completed, no error */
		UINT32	rsrv3 : 1;	/* reserved bits (set to 0) */
		UINT32	c : 1;		/* 1 = command completed */
		UINT32	code : 3;	/* command code (7 = diagnose) */
		UINT32	rsrv4 : 10;	/* reserved bits (set to 0) */
		UINT32	i : 1;		/* 1 = interrupt upon completion */
		UINT32	s : 1;		/* 1 = suspend CU upon completion */
		UINT32	el : 1;		/* 1 = last cmdBlock in list */
		union cmdBlock *link;	/* next block in list */
	} diagnose;
};

/* Receive frame descriptors (uses simplified memory structure) */
struct rfd {
	UINT32	rxColl : 1;	/* 1 = collision on reception */
	UINT32	iaMatch : 1;	/* Dest addr matched chip's hardware addr */
	UINT32	rsrv1 : 2;	/* reserved bits (set to 0) */
	UINT32	rxErr : 1;	/* RX_ER pin asserted during frame reception */
	UINT32	typeFrame : 1;	/* Type field of pkt. indicates a TYPE frame */
	UINT32	rsrv2 : 1;	/* reserved bits (set to 0) */
	UINT32	frameTooshort : 1;
	UINT32	dmaOverrun : 1;	/* DMA overrun (couldn't get local bus) */
	UINT32	noRsrc : 1;	/* No resources (out of buffer space) */
	UINT32	alignErr : 1;	/* CRC error on misaligned frame */
	UINT32	crcErr : 1;	/* CRC error on aligned frame */
	UINT32	rsrv3 : 1;	/* reserved bits (set to 0) */
	UINT32	ok : 1;		/* 1 = command completed, no error */
	UINT32	rsrv4 : 1;	/* reserved bits (set to 0) */
	UINT32	c : 1;		/* 1 = command completed */
	UINT32	rsrv5 : 3;	/* reserved bits (set to 0) */
	UINT32	sf : 1;		/* 1 = Flexible mode */
	UINT32	h : 1;		/* 1 = Header RFD */
	UINT32	rsrv6 : 9;	/* reserved bits (set to 0) */
	UINT32	s : 1;		/* 1 = suspend CU upon completion */
	UINT32	el : 1;		/* 1 = last cmdBlock in list */
	union cmdBlock *link;	/* next block in list */
	UINT8	*rbdAddr;	/* rx buf desc addr; all 1s for simple mode */
	UINT32	actCount : 14;	/* # bytes in this buffer (set by 82557) */
	UINT32	f : 1;		/* 1 = buffer used */
	UINT32	eof : 1;	/* 1 = last buffer for this frame */
	UINT32	size : 14;	/* # bytes avail in this buffer (set by CPU) */
	UINT32	rsrv7 : 2;	/* reserved bits (set to 0) */
	UINT8	destAddr[6];	/* destination address */
	UINT8	sourceAddr[6];	/* source address */
	UINT16	length;		/* 802.3 packet length (from packet) */
	UINT8	rxData[ETHERMTU];	/* optional data (simplified mode) */
};

/* Forward declarations */
static void portWrite ();
static void resetChip ();
static void makePacket ();
static int checkPacket ();
static int i557IntHandler (int);
static int waitForInt();

static void sendCommand (UINT8  cuc,
                         UINT8  ruc,
                         UINT32 scb_general_ptr);

static UINT16 readMDI (
	int	unit,
        UINT8   phyAdd,
        UINT8   regAdd
        );

static void writeMDI (
	int	unit,
        UINT8   phyAdd,
        UINT8   regAdd,
        UINT16  data
        );

static int initPHY (UINT32 device_type, int loop_mode);

static int get_ether_addr (
                int     unit,
                UINT8   *buffer,
                int     print_flag      /* TRUE to print the information */
                );