📄 hal_platform_ints.h
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#ifndef CYGONCE_HAL_PLATFORM_INTS_H
#define CYGONCE_HAL_PLATFORM_INTS_H
//==========================================================================
//
// hal_platform_ints.h
//
// HAL Interrupt and clock support
//
//==========================================================================
//####COPYRIGHTBEGIN####
//
// -------------------------------------------
// The contents of this file are subject to the Red Hat eCos Public License
// Version 1.1 (the "License"); you may not use this file except in
// compliance with the License. You may obtain a copy of the License at
// http://www.redhat.com/
//
// Software distributed under the License is distributed on an "AS IS"
// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
// License for the specific language governing rights and limitations under
// the License.
//
// The Original Code is eCos - Embedded Configurable Operating System,
// released September 30, 1998.
//
// The Initial Developer of the Original Code is Red Hat.
// Portions created by Red Hat are
// Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
// All Rights Reserved.
// -------------------------------------------
//
//####COPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): lagarwal
// Contributors:
// Date: 2002-02-25
// Purpose: Define Interrupt support
// Description: The interrupt details for the IXDP2400 are defined here.
// Usage:
// #include <cyg/hal/hal_platform_ints.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
#define CYGNUM_HAL_INTERRUPT_reserved0 0
#define CYGNUM_HAL_INTERRUPT_NIRQ 1 // IRQ
#define CYGNUM_HAL_INTERRUPT_NFIQ 2 // FIQ
#define CYGNUM_HAL_INTERRUPT_SOFT 3 // soft interrupt
#define CYGNUM_HAL_INTERRUPT_ERR 4 // error
#define CYGNUM_HAL_INTERRUPT_SERIAL 5 // UART
#define CYGNUM_HAL_INTERRUPT_GPIO 6 // GPIO
#define CYGNUM_HAL_INTERRUPT_TIMER_1 7 // Timer 1
#define CYGNUM_HAL_INTERRUPT_TIMER_2 8 // timer 2
#define CYGNUM_HAL_INTERRUPT_TIMER_3 9 // timer 3
#define CYGNUM_HAL_INTERRUPT_TIMER_4 10 // timer 4
#define CYGNUM_HAL_INTERRUPT_SLOW_PORT 11 // slow port
#define CYGNUM_HAL_INTERRUPT_PCI_CONT 12 // PCI control
#define CYGNUM_HAL_INTERRUPT_PCI_INTA 13 // INTA
#define CYGNUM_HAL_INTERRUPT_PCI_INTB 14 // INTB
#define CYGNUM_HAL_INTERRUPT_ETHERNET 15 // ethernet
#define CYGNUM_HAL_INTERRUPT_SLAVE_NPU 16 // slave npu
#define CYGNUM_HAL_ISR_MIN 0
#define CYGNUM_HAL_ISR_MAX 16
#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX+1)
// The vector used by the Real time clock
#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER
extern void hal_delay_us(cyg_uint32 usecs);
#define HAL_DELAY_US(n) hal_delay_us(n);
//----------------------------------------------------------------------------
// Reset.
#include <cyg/hal/hal_ixdp2400.h> // registers
#include <cyg/hal/hal_io.h> // IO macros
// FIXME - Can we reset the board?
#define HAL_PLATFORM_RESET() CYG_EMPTY_STATEMENT
#define HAL_PLATFORM_RESET_ENTRY 0x00000000
#endif // CYGONCE_HAL_PLATFORM_INTS_H
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