ntb_srom_util.h

基于ecos的redboot

/*
---------------------------------------------------------------------------
                 Copyright (c) 2002, 2003 Intel Corporation
						 All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer. 
* Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution. 
* Neither the name of Intel Corporation nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission. 
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                      
---------------------------------------------------------------------------
system: IXDP2400
subsystem: BootMonitor
author: lagarwal
revisions:
--------------------------------------------------------------------------
*/

#ifndef NTB_SROM_UTIL_H
#define NTB_SROM_UTIL_H

#define SROM_NUM_BYTES  0x43
#define SROM_WAIT_USEC	4000

#define I21555_ROM_SETUP				(0xC8)
#define I21555_ROM_DATA					(0xCA)
#define I21555_ROM_ADDR					(0xCC)
#define I21555_ROM_CTRL					(0xCF)

#define I21555_ROM_ADDR_OpGeneral		(0 << 9)
#define I21555_ROM_ADDR_Write			(1 << 9)
#define I21555_ROM_ADDR_Read			(2 << 9)
#define I21555_ROM_ADDR_Erase			(3 << 9)

#define I21555_ROM_ADDR_WriteDisable	((0 << 7) | I21555_ROM_ADDR_OpGeneral)
#define I21555_ROM_ADDR_WriteAll		((1 << 7) | I21555_ROM_ADDR_OpGeneral)
#define I21555_ROM_ADDR_EraseAll		((2 << 7) | I21555_ROM_ADDR_OpGeneral)
#define I21555_ROM_ADDR_WriteEnable		((3 << 7) | I21555_ROM_ADDR_OpGeneral)

#define I21555_ROM_CTRL_SromStartBusy	((char)(1 << 0))
#define I21555_ROM_CTRL_PromStartBusy	((char)(1 << 1))
#define I21555_ROM_CTRL_Write			((char)(1 << 2))
#define I21555_ROM_CTRL_Read			((char)(0 << 2))
#define I21555_ROM_CTRL_SromPoll		((char)(1 << 3))

void write_srom(char *buf, unsigned long len);
int read_srom_byte(char off, char *val);

#endif