📄 cfg_utility.h
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/* cfg_utility.h
---------------------------------------------------------------------------
Copyright (c) 2002, 2003 Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------
system: IXDP2400
subsystem: BootMonitor
author: gvaddadi
revisions:
--------------------------------------------------------------------------
*/
#ifndef I2C_UTILITY_H
#define I2C_UTILITY_H
#include <cyg/hal/hal_ixdp2400.h>
/*Default data in the serial EPROM*/
#define USER 1
#define DEFAULT 0
#define ERROR 0
#define OK 1
#define PAGESZ 16
#define MAX_CFG_DATA_SZ 256
#define CFG_MAN_ID_LEN 12 /*bytes*/
#define CFG_MODEL_ID_LEN 12 /*bytes*/
#define CFG_PARTNUM_LEN 10 /*bytes*/
#define CFG_PARTREV_LEN 2 /*bytes*/
#define CFG_SERIAL_NUM_LEN 10 /*bytes*/
#define CFG_DATE_LEN 8 /*bytes*/
#define CFG_PASSWD_LEN 8 /*bytes*/
#define CFG_UART_BAUD_LEN 4 /*bytes*/
#define CFG_MAC_ADDR_LEN 6 /*bytes*/
#define CFG_CHKSUM_LEN 4 /*bytes*/
#define DEFAULT_MANID "Intel"
#define DEFAULT_OP_FREQ 200
#define DEV_ID_ADDR 0x1
#define CONFIG_DATA_VALID 0x12345678
#define MAC_VENDOR_ID 0x0090D7
/*test status defines*/
#define NOT_TESTED '0'
#define SKU1_PASS '1'
#define SKU1_FAIL '2'
#define SKU2_PASS '3'
#define SKU2_FAIL '4'
#define PASS '1'
#define FAIL '2'
struct COMMON_CFG_CONTENT {
unsigned char prom_fmt;
unsigned char dev_id;
unsigned char man_id[12];
unsigned char part_rev [2];
unsigned char part_num[10];
unsigned char serial_num[10];
unsigned char model_id[12];
unsigned char rsvd1[8];
unsigned char passwd[8];
unsigned char test_status;
unsigned char date[8];
unsigned char chksum[4];
unsigned char rsvd2[3];
};
struct KI_EEPROM_CONTENT {
struct COMMON_CFG_CONTENT comm_cfg;
unsigned int rsvd1;
unsigned char M_ether_mac_addr[6];
unsigned int rsvd2;
unsigned char S_ether_mac_addr[6];
unsigned char rsvd3[12];
};
struct PL_EEPROM_CONTENT {
struct COMMON_CFG_CONTENT comm_cfg;
unsigned char mac_addr0[6];
unsigned char mac_addr1[6];
unsigned int rsvd1;
unsigned char mac_addr2[6];
unsigned char mac_addr3[6];
unsigned int rsvd2;
};
struct MI_EEPROM_CONTENT {
struct COMMON_CFG_CONTENT comm_cfg;
unsigned int ch_freq;
unsigned char rsvd1[12];
};
struct board_config
{
struct KI_EEPROM_CONTENT config_data;
int sdram_size;
int qdr_channel_size[MAX_QDR_CHANNEL];
int flash_size;
int config_valid;
};
unsigned long from_hex(unsigned char *buf, int size);
unsigned char calculate_chksum(unsigned char value);
#endif
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