hal_platform_ints.h

基于ecos的redboot

#ifndef CYGONCE_HAL_PLATFORM_INTS_H
#define CYGONCE_HAL_PLATFORM_INTS_H
//==========================================================================
//
//      hal_platform_ints.h
//
//      HAL Interrupt and clock support
//
//==========================================================================
//####COPYRIGHTBEGIN####
//                                                                          
// -------------------------------------------                              
// The contents of this file are subject to the Red Hat eCos Public License 
// Version 1.1 (the "License"); you may not use this file except in         
// compliance with the License.  You may obtain a copy of the License at    
// http://www.redhat.com/                                                   
//                                                                          
// Software distributed under the License is distributed on an "AS IS"      
// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied.  See the 
// License for the specific language governing rights and limitations under 
// the License.                                                             
//                                                                          
// The Original Code is eCos - Embedded Configurable Operating System,      
// released September 30, 1998.                                             
//                                                                          
// The Initial Developer of the Original Code is Red Hat.                   
// Portions created by Red Hat are                                          
// Copyright (C) 1998, 1999, 2000 Red Hat, Inc.                             
// All Rights Reserved.                                                     
// -------------------------------------------                              
//                                                                          
//####COPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    lagarwal
// Contributors: 
// Date:         2002-02-25
// Purpose:      Define Interrupt support
// Description:  The interrupt details for the IXDP2400 are defined here.
// Usage:
//               #include <cyg/hal/hal_platform_ints.h>
//               ...
//              
//
//####DESCRIPTIONEND####
//
//==========================================================================

#include <cyg/infra/cyg_type.h>

typedef void pci_ISR(cyg_uint32 vector, CYG_ADDRWORD data);

#define PCI_INTERRUPT_BASE				32
#define INT_REG_EMPTY					0
#define PCI_ISR_COUNT					8 // for CPLD interrupts

#define CYGNUM_HAL_INTERRUPT_reserved0	0
#define CYGNUM_HAL_INTERRUPT_SOFT		1 // soft interrupt
#define CYGNUM_HAL_INTERRUPT_ERR		2 // error
#define CYGNUM_HAL_INTERRUPT_SERIAL		3 // UART
#define CYGNUM_HAL_INTERRUPT_GPIO		4 // GPIO
#define CYGNUM_HAL_INTERRUPT_TIMER_1	5 // Timer 1
#define CYGNUM_HAL_INTERRUPT_TIMER_2	6 // timer 2
#define CYGNUM_HAL_INTERRUPT_TIMER_3	7 // timer 3
#define CYGNUM_HAL_INTERRUPT_TIMER_4	8 // timer 4
#define CYGNUM_HAL_INTERRUPT_SLOW_PORT	9 // slow port
#define CYGNUM_HAL_INTERRUPT_FRAMER		10 // framer
#define CYGNUM_HAL_INTERRUPT_DMA_1		11 // DMA engine 1
#define CYGNUM_HAL_INTERRUPT_DMA_2		12 // DMA engine 2
#define CYGNUM_HAL_INTERRUPT_DMA_3		13 // DMA engine 3
#define CYGNUM_HAL_INTERRUPT_PCI_DBELL	14 // doorbell
#define CYGNUM_HAL_INTERRUPT_ME_ATTN	15 // microengine
#define CYGNUM_HAL_INTERRUPT_PCI		16 // pci inta or intb

#define CYGNUM_HAL_INTERRUPT_PCI_CONT	(PCI_INTERRUPT_BASE + 26) // PCI control
#define CYGNUM_HAL_INTERRUPT_PCI_INTA	(PCI_INTERRUPT_BASE + 27) // INTA
#define CYGNUM_HAL_INTERRUPT_PCI_INTB	(PCI_INTERRUPT_BASE + 28) // INTB
#define CYGNUM_HAL_INTERRUPT_PCI_DMA_1	(PCI_INTERRUPT_BASE + 29) // DMA engine 1
#define CYGNUM_HAL_INTERRUPT_PCI_DMA_2	(PCI_INTERRUPT_BASE + 30) // DMA engine 2
#define CYGNUM_HAL_INTERRUPT_PCI_DMA_3	(PCI_INTERRUPT_BASE + 31) // DMA engine 3

#define CPLD_INTERRUPT_SLAVE_NPU		0 // slave npu
#define CPLD_INTERRUPT_ETHERNET			1 // ethernet

#define CYGNUM_HAL_ISR_MIN              0
#define CYGNUM_HAL_ISR_MAX              64

#define CYGNUM_HAL_ISR_COUNT            (CYGNUM_HAL_ISR_MAX+1)

// The vector used by the Real time clock
#define CYGNUM_HAL_INTERRUPT_RTC        CYGNUM_HAL_INTERRUPT_TIMER_1

extern void hal_delay_us(cyg_uint32 usecs);
#define HAL_DELAY_US(n)          hal_delay_us(n);

//----------------------------------------------------------------------------
// Reset.
#include <cyg/hal/hal_ixdp2400.h>        // registers
#include <cyg/hal/hal_io.h>             // IO macros

// reset the board
extern void ixdp2400_reset(void);
#define HAL_PLATFORM_RESET()   ixdp2400_reset()

#define HAL_PLATFORM_RESET_ENTRY 0x00000000

void pciIntConnect(int vector, CYG_ADDRESS routine, CYG_ADDRWORD data);
void pciIntDisconnect(int vector);
void hal_sram_init(int channel, int skip_csr, int frm_pci, int offset);
int strap_options_val(void);
unsigned long swap32(unsigned long x);
unsigned short swap16(unsigned short x);
void display_led(char firstchar, char secondchar, char thirdchar, char fourthchar);

#endif // CYGONCE_HAL_PLATFORM_INTS_H