📄 hal_ebsa285.h
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#define SA110_PCI_CFG_COMMAND SA110_REGISTER(SA110_PCI_CFG_COMMAND_o)
#define SA110_PCI_CFG_INT_LINE SA110_REGISTER(SA110_PCI_CFG_INT_LINE_o)
#define SA110_PCI_CFG_CSR_MEM_BAR SA110_REGISTER(SA110_PCI_CFG_CSR_MEM_BAR_o)
#define SA110_PCI_CFG_CSR_IO_BAR SA110_REGISTER(SA110_PCI_CFG_CSR_IO_BAR_o)
#define SA110_PCI_CFG_SDRAM_BAR SA110_REGISTER(SA110_PCI_CFG_SDRAM_BAR_o)
/*
* These live in the same space as the PCI config registers, but
* are specific to the 21285.
*/
#define SA110_OUT_INT_STATUS_o 0x30
#define SA110_OUT_INT_MASK_o 0x34
#define SA110_INBOUND_FIFO_o 0x40
#define SA110_OUTBOUND_FIFO_o 0x44
#define SA110_MAILBOX0_o 0x50
#define SA110_MAILBOX1_o 0x54
#define SA110_MAILBOX2_o 0x58
#define SA110_MAILBOX3_o 0x5C
#define SA110_DOORBELL_o 0x60
#define SA110_DOORBELL_SETUP_o 0x64
#define SA110_OUT_INT_STATUS SA110_REGISTER(SA110_OUT_INT_STATUS_o)
#define SA110_PCI_ADDR_EXT_o 0x140
#define SA110_DOORBELL_PCI_MASK_o 0x150
#define SA110_DOORBELL_SA_MASK_o 0x154
#define SA110_PCI_ADDR_EXT SA110_REGISTER(SA110_PCI_ADDR_EXT_o)
#define SA110_DOORBELL_PCI_MASK SA110_REGISTER(SA110_DOORBELL_PCI_MASK_o)
#define SA110_DOORBELL_SA_MASK SA110_REGISTER(SA110_DOORBELL_SA_MASK_o)
#define SA110_OUT_INT_STATUS_DOORBELL_INT 0x4
#define SA110_OUT_INT_STATUS_OUTBOUND_INT 0x8
/*
* SA-110 CSR Register Definitions
*/
#define SA110_CSR_BASE_ADDRESS_MASK_o 0xF8
#define SA110_CSR_BASE_ADDRESS_OFFSET_o 0xFC
#define SA110_CSR_BASE_ADDRESS_MASK SA110_REGISTER(SA110_CSR_BASE_ADDRESS_MASK_o)
#define SA110_CSR_BASE_ADDRESS_OFFSET SA110_REGISTER(SA110_CSR_BASE_ADDRESS_OFFSET_o)
/*
* SA-110 CSR Register Value Definitions
*/
#define SA110_CSR_WINDOW_SIZE_128 0x00000000
#define SA110_CSR_WINDOW_SIZE_512KB 0x00040000
#define SA110_CSR_WINDOW_SIZE_1MB 0x000C0000
#define SA110_CSR_WINDOW_SIZE_2MB 0x001C0000
#define SA110_CSR_WINDOW_SIZE_4MB 0x003C0000
#define SA110_CSR_WINDOW_SIZE_8MB 0x007C0000
#define SA110_CSR_WINDOW_SIZE_16MB 0x00FC0000
#define SA110_CSR_WINDOW_SIZE_32MB 0x01FC0000
#define SA110_CSR_WINDOW_SIZE_64MB 0x03FC0000
#define SA110_CSR_WINDOW_SIZE_128MB 0x07FC0000
#define SA110_CSR_WINDOW_SIZE_256MB 0x0FFC0000
/*
* SA-110 SDRAM Register Definitions
*/
#define SA110_SDRAM_ARRAY_0_MODE_REGISTER_BASE REG32_PTR(0x40000000)
#define SA110_SDRAM_ARRAY_1_MODE_REGISTER_BASE REG32_PTR(0x40004000)
#define SA110_SDRAM_ARRAY_2_MODE_REGISTER_BASE REG32_PTR(0x40008000)
#define SA110_SDRAM_ARRAY_3_MODE_REGISTER_BASE REG32_PTR(0x4000C000)
#define SA110_SDRAM_BASE_ADDRESS_MASK_o 0x100
#define SA110_SDRAM_BASE_ADDRESS_OFFSET_o 0x104
#define SA110_EXP_ROM_BASE_ADDRESS_MASK_o 0x108
#define SA110_SDRAM_TIMING_o 0x10C
#define SA110_SDRAM_ADDRESS_SIZE_ARRAY_0_o 0x110
#define SA110_SDRAM_ADDRESS_SIZE_ARRAY_1_o 0x114
#define SA110_SDRAM_ADDRESS_SIZE_ARRAY_2_o 0x118
#define SA110_SDRAM_ADDRESS_SIZE_ARRAY_3_o 0x11C
#define SA110_SDRAM_BASE_ADDRESS_MASK SA110_REGISTER(SA110_SDRAM_BASE_ADDRESS_MASK_o)
#define SA110_SDRAM_BASE_ADDRESS_OFFSET SA110_REGISTER(SA110_SDRAM_BASE_ADDRESS_OFFSET_o)
#define SA110_EXP_ROM_BASE_ADDRESS_MASK SA110_REGISTER(SA110_EXP_ROM_BASE_ADDRESS_MASK_o)
#define SA110_SDRAM_TIMING SA110_REGISTER(SA110_SDRAM_TIMING_o)
#define SA110_SDRAM_ADDRESS_SIZE_ARRAY_0 SA110_REGISTER(SA110_SDRAM_ADDRESS_SIZE_ARRAY_0_o)
#define SA110_SDRAM_ADDRESS_SIZE_ARRAY_1 SA110_REGISTER(SA110_SDRAM_ADDRESS_SIZE_ARRAY_1_o)
#define SA110_SDRAM_ADDRESS_SIZE_ARRAY_2 SA110_REGISTER(SA110_SDRAM_ADDRESS_SIZE_ARRAY_2_o)
#define SA110_SDRAM_ADDRESS_SIZE_ARRAY_3 SA110_REGISTER(SA110_SDRAM_ADDRESS_SIZE_ARRAY_3_o)
#define SA110_SDRAM_SIZE_1M 1
#define SA110_SDRAM_SIZE_2M 2
#define SA110_SDRAM_SIZE_4M 3
#define SA110_SDRAM_SIZE_8M 4
#define SA110_SDRAM_SIZE_16M 5
#define SA110_SDRAM_SIZE_32M 6
#define SA110_SDRAM_SIZE_64M 7
#define SA110_SDRAM_MUX_MODE0 0x00
#define SA110_SDRAM_MUX_MODE1 0x10
#define SA110_SDRAM_MUX_MODE2 0x20
#define SA110_SDRAM_MUX_MODE3 0x30
#define SA110_SDRAM_MUX_MODE4 0x40
#define SA110_SDRAM_MUX_MODE_MASK 0x70
/*
* SA-110 SDRAM Configuration Value Definitions
*/
#define SA110_SDRAM_WINDOW_SIZE_256KB 0x00000000
#define SA110_SDRAM_WINDOW_SIZE_512KB 0x00040000
#define SA110_SDRAM_WINDOW_SIZE_1MB 0x000C0000
#define SA110_SDRAM_WINDOW_SIZE_2MB 0x001C0000
#define SA110_SDRAM_WINDOW_SIZE_4MB 0x003C0000
#define SA110_SDRAM_WINDOW_SIZE_8MB 0x007C0000
#define SA110_SDRAM_WINDOW_SIZE_16MB 0x00FC0000
#define SA110_SDRAM_WINDOW_SIZE_32MB 0x01FC0000
#define SA110_SDRAM_WINDOW_SIZE_64MB 0x03FC0000
#define SA110_SDRAM_WINDOW_SIZE_128MB 0x07FC0000
#define SA110_SDRAM_WINDOW_SIZE_256MB 0x0FFC0000
#define SA110_SDRAM_WINDOW_SIZE_NO_WINDOW 0x8FFC0000
/*
* SA-110 Expansion ROM Configuration Value Definitions
*/
#define SA110_EXP_ROM_WINDOW_SIZE_1MB 0x00000000
#define SA110_EXP_ROM_WINDOW_SIZE_2MB 0x00100000
#define SA110_EXP_ROM_WINDOW_SIZE_4MB 0x00300000
#define SA110_EXP_ROM_WINDOW_SIZE_8MB 0x00700000
#define SA110_EXP_ROM_WINDOW_SIZE_16MB 0x00F00000
#define SA110_EXP_ROM_WINDOW_SIZE_NO_WINDOW 0x80F00000
/*
* SA-110 SDRAM Timing Register Field Definitions
*/
#define SA110_SDRAM_ROW_PRECHARGE_1_CYCLE 0x00000000
#define SA110_SDRAM_ROW_PRECHARGE_2_CYCLES 0x00000001
#define SA110_SDRAM_ROW_PRECHARGE_3_CYCLES 0x00000002
#define SA110_SDRAM_ROW_PRECHARGE_4_CYCLES 0x00000003
#define SA110_SDRAM_LAST_DATA_IN_2_CYCLES 0x00000000
#define SA110_SDRAM_LAST_DATA_IN_3_CYCLES 0x00000004
#define SA110_SDRAM_LAST_DATA_IN_4_CYCLES 0x00000008
#define SA110_SDRAM_LAST_DATA_IN_5_CYCLES 0x0000000C
#define SA110_SDRAM_RAS_TO_CAS_DELAY_2_CYCLES 0x00000020
#define SA110_SDRAM_RAS_TO_CAS_DELAY_3_CYCLES 0x00000030
#define SA110_SDRAM_CAS_LATENCY_2_CYCLES 0x00000080
#define SA110_SDRAM_CAS_LATENCY_3_CYCLES 0x000000C0
#define SA110_SDRAM_ROW_CYCLE_TIME_4_CYCLES 0x00000100
#define SA110_SDRAM_ROW_CYCLE_TIME_5_CYCLES 0x00000200
#define SA110_SDRAM_ROW_CYCLE_TIME_6_CYCLES 0x00000300
#define SA110_SDRAM_ROW_CYCLE_TIME_7_CYCLES 0x00000400
#define SA110_SDRAM_ROW_CYCLE_TIME_8_CYCLES 0x00000500
#define SA110_SDRAM_ROW_CYCLE_TIME_9_CYCLES 0x00000600
#define SA110_SDRAM_ROW_CYCLE_TIME_10_CYCLES 0x00000700
#define SA110_SDRAM_COMMAND_DRIVE_SAME_CYCLE 0x00000000
#define SA110_SDRAM_COMMAND_DRIVE_1_CYCLE 0x00000800
#define SA110_SDRAM_PARITY_DISABLED 0x00000000
#define SA110_SDRAM_PARITY_ENABLED 0x00001000
#define SA110_SDRAM_PARITY_MASK 0x00001000
#define SA110_SDRAM_SA110_PRIME_DISABLED 0x00000000
#define SA110_SDRAM_SA110_PRIME_ENABLED 0x00002000
#define SA110_SDRAM_SA110_PRIME_MASK 0x00002000
#define SA110_SDRAM_REFRESH_INTERVAL(x) (((x) << 16) & 0x003f0000)
#define SA110_SDRAM_REFRESH_INTERVAL_MIN SA110_SDRAM_REFRESH_INTERVAL(1)
#define SA110_SDRAM_REFRESH_INTERVAL_NORMAL SA110_SDRAM_REFRESH_INTERVAL(0x1A)
/*
* SA-110 SDRAM Address and Size Register Field Definitions
*/
#define SA110_SDRAM_SIZE_0 0x000000000
#define SA110_SDRAM_SIZE_1MB 0x000000001
#define SA110_SDRAM_SIZE_2MB 0x000000002
#define SA110_SDRAM_SIZE_4MB 0x000000003
#define SA110_SDRAM_SIZE_8MB 0x000000004
#define SA110_SDRAM_SIZE_16MB 0x000000005
#define SA110_SDRAM_SIZE_32MB 0x000000006
#define SA110_SDRAM_SIZE_64MB 0x000000007
#define SA110_SDRAM_ADDRESS_MULTIPLEX_MASK 0x000000070
#define SA110_SDRAM_ARRAY_BASE_MASK 0x00FF00000
/*
* SA-110 Control Register.
*/
#define SA110_CONTROL_o 0x13C
#define SA110_CONTROL SA110_REGISTER(SA110_CONTROL_o)
/*
* Control bits.
*/
#define SA110_CONTROL_INIT_COMPLETE 0x00000001
#define SA110_CONTROL_RST_I 0x00000200
#define SA110_CONTROL_WATCHDOG 0x00002000
#define SA110_CONTROL_CFN 0x80000000
/*
* SA-110 UART Control/Configuration Registers.
*/
#define SA110_UART_DATA_REGISTER_o 0x160
#define SA110_UART_RXSTAT_o 0x164
#define SA110_UART_H_BAUD_CONTROL_o 0x168
#define SA110_UART_M_BAUD_CONTROL_o 0x16C
#define SA110_UART_L_BAUD_CONTROL_o 0x170
#define SA110_UART_CONTROL_REGISTER_o 0x174
#define SA110_UART_FLAG_REGISTER_o 0x178
#define SA110_UART_DATA_REGISTER SA110_REGISTER(SA110_UART_DATA_REGISTER_o)
#define SA110_UART_RXSTAT SA110_REGISTER(SA110_UART_RXSTAT_o)
#define SA110_UART_H_BAUD_CONTROL SA110_REGISTER(SA110_UART_H_BAUD_CONTROL_o)
#define SA110_UART_M_BAUD_CONTROL SA110_REGISTER(SA110_UART_M_BAUD_CONTROL_o)
#define SA110_UART_L_BAUD_CONTROL SA110_REGISTER(SA110_UART_L_BAUD_CONTROL_o)
#define SA110_UART_CONTROL_REGISTER SA110_REGISTER(SA110_UART_CONTROL_REGISTER_o)
#define SA110_UART_FLAG_REGISTER SA110_REGISTER(SA110_UART_FLAG_REGISTER_o)
#define UART_BASE_0 SA110_UART_DATA_REGISTER
/*
* SA-110 UART Data Register bit masks
*/
#define SA110_UART_DATA_MASK 0x000000FF
/*
* SA-110 UART RX Status Register bit masks
*/
#define SA110_UART_FRAMING_ERROR_MASK 0x00000001
#define SA110_UART_PARITY_ERROR_MASK 0x00000002
#define SA110_UART_OVERRUN_ERROR_MASK 0x00000004
/*
* SA-110 UART High Baud Control Register bit masks
*/
#define SA110_UART_BREAK_DISABLED 0x00000000
#define SA110_UART_BREAK_ENABLED 0x00000001
#define SA110_UART_BREAK_MASK 0x00000001
#define SA110_UART_PARITY_DISABLED 0x00000000
#define SA110_UART_PARITY_ENABLED 0x00000002
#define SA110_UART_PARITY_MASK 0x00000002
#define SA110_UART_PARITY_ODD 0x00000000
#define SA110_UART_PARITY_EVEN 0x00000004
#define SA110_UART_ODD_EVEN_SELECT_MASK 0x00000004
#define SA110_UART_STOP_BITS_ONE 0x00000000
#define SA110_UART_STOP_BITS_TWO 0x00000008
#define SA110_UART_STOP_BITS_SELECT_MASK 0x00000008
#define SA110_UART_FIFO_DISABLED 0x00000000
#define SA110_UART_FIFO_ENABLED 0x00000010
#define SA110_UART_FIFO_ENABLE_MASK 0x00000010
#define SA110_UART_DATA_LENGTH_5_BITS 0x00000000
#define SA110_UART_DATA_LENGTH_6_BITS 0x00000020
#define SA110_UART_DATA_LENGTH_7_BITS 0x00000040
#define SA110_UART_DATA_LENGTH_8_BITS 0x00000060
#define SA110_UART_DATA_LENGTH_MASK 0x00000060
/*
* SA-110 UART Medium Baud Control Register bit masks
*/
#define SA110_UART_H_BAUD_RATE_DIVISOR_MASK 0x0000000F
/*
* SA-110 UART Low Baud Control Register bit masks
*/
#define SA110_UART_L_BAUD_RATE_DIVISOR_MASK 0x000000FF
/*
* SA-110 UART Control Register bit fields
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