at91rm9200.h

Vxworks下BSP源码

/* sngks32c.h - header for Samsung ks32c with ARM7 core */

/* Copyright 1984-2001 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01a,12apr01,m_h  created from snds100 template.
*/

#ifndef _AT91RM9200_H

#define _AT91RM9200_H

#ifdef __cplusplus
extern "C" {
#endif


/*#define RESET_DRAM_START    0x20000000    /* Start of DRAM on power-up */
/*#define RESET_ROM_START     0x0          /* Start of ROM on power-up */




#define AT91C_EXC_BASE		0x20000100



/*************************************************************************
* AT91RM9200 SPECIAL REGISTERS 
*
*/


// *****************************************************************************
//               REGISTER ADDRESS DEFINITION FOR AT91RM9200
// *****************************************************************************
// ========== Register definition for SYS peripheral ========== 
// ========== Register definition for MC peripheral ========== 
#define AT91C_MC_PUER   	0xFFFFFF54 // MC MC Protection Unit Enable Register
#define AT91C_MC_ASR    	0xFFFFFF04 // MC MC Abort Status Register
#define AT91C_MC_PUP    	0xFFFFFF50 // MC MC Protection Unit Peripherals
#define AT91C_MC_PUIA   	0xFFFFFF10 // MC MC Protection Unit Area
#define AT91C_MC_AASR   	0xFFFFFF08 // MC MC Abort Address Status Register
#define AT91C_MC_RCR    	0xFFFFFF00 // MC MC Remap Control Register
// ========== Register definition for RTC peripheral ========== 
#define AT91C_RTC_IMR   	0xFFFFFE28 // RTC Interrupt Mask Register
#define AT91C_RTC_IER   	0xFFFFFE20 // RTC Interrupt Enable Register
#define AT91C_RTC_SR    	0xFFFFFE18 // RTC Status Register
#define AT91C_RTC_TIMALR 	0xFFFFFE10 // RTC Time Alarm Register
#define AT91C_RTC_TIMR  	0xFFFFFE08 // RTC Time Register
#define AT91C_RTC_CR    	0xFFFFFE00 // RTC Control Register
#define AT91C_RTC_VER   	0xFFFFFE2C // RTC Valid Entry Register
#define AT91C_RTC_IDR   	0xFFFFFE24 // RTC Interrupt Disable Register
#define AT91C_RTC_SCCR  	0xFFFFFE1C // RTC Status Clear Command Register
#define AT91C_RTC_CALALR 	0xFFFFFE14 // RTC Calendar Alarm Register
#define AT91C_RTC_CALR  	0xFFFFFE0C // RTC Calendar Register
#define AT91C_RTC_MR    	0xFFFFFE04 // RTC Mode Register
// ========== Register definition for ST peripheral ========== 
#define AT91C_ST_CRTR   	0xFFFFFD24 // ST Current Real-time Register
#define AT91C_ST_IMR    	0xFFFFFD1C // ST Interrupt Mask Register
#define AT91C_ST_IER    	0xFFFFFD14 // ST Interrupt Enable Register
#define AT91C_ST_RTMR   	0xFFFFFD0C // ST Real-time Mode Register
#define AT91C_ST_PIMR   	0xFFFFFD04 // ST Period Interval Mode Register
#define AT91C_ST_RTAR   	0xFFFFFD20 // ST Real-time Alarm Register
#define AT91C_ST_IDR    	0xFFFFFD18 // ST Interrupt Disable Register
#define AT91C_ST_SR     	0xFFFFFD10 // ST Status Register
#define AT91C_ST_WDMR   	0xFFFFFD08 // ST Watchdog Mode Register
#define AT91C_ST_CR     	0xFFFFFD00 // ST Control Register
// ========== Register definition for PMC peripheral ========== 
#define AT91C_PMC_SCSR  	0xFFFFFC08 // PMC System Clock Status Register
#define AT91C_PMC_SCER  	0xFFFFFC00 // PMC System Clock Enable Register
#define AT91C_PMC_IMR   	0xFFFFFC6C // PMC Interrupt Mask Register
#define AT91C_PMC_IDR   	0xFFFFFC64 // PMC Interrupt Disable Register
#define AT91C_PMC_PCDR  	0xFFFFFC14 // PMC Peripheral Clock Disable Register
#define AT91C_PMC_SCDR  	0xFFFFFC04 // PMC System Clock Disable Register
#define AT91C_PMC_SR    	0xFFFFFC68 // PMC Status Register
#define AT91C_PMC_IER   	0xFFFFFC60 // PMC Interrupt Enable Register
#define AT91C_PMC_MCKR  	0xFFFFFC30 // PMC Master Clock Register
#define AT91C_PMC_PCER  	0xFFFFFC10 // PMC Peripheral Clock Enable Register
#define AT91C_PMC_PCSR  	0xFFFFFC18 // PMC Peripheral Clock Status Register
#define AT91C_PMC_PCKR  	0xFFFFFC40 // PMC Programmable Clock Register
// ========== Register definition for CKGR peripheral ========== 
#define AT91C_CKGR_PLLBR 	0xFFFFFC2C // CKGR PLL B Register
#define AT91C_CKGR_MCFR 	0xFFFFFC24 // CKGR Main Clock  Frequency Register
#define AT91C_CKGR_PLLAR 	0xFFFFFC28 // CKGR PLL A Register
#define AT91C_CKGR_MOR  	0xFFFFFC20 // CKGR Main Oscillator Register
// ========== Register definition for PIOD peripheral ========== 
#define AT91C_PIOD_PDSR 	0xFFFFFA3C // PIOD Pin Data Status Register
#define AT91C_PIOD_CODR 	0xFFFFFA34 // PIOD Clear Output Data Register
#define AT91C_PIOD_OWER 	0xFFFFFAA0 // PIOD Output Write Enable Register
#define AT91C_PIOD_MDER 	0xFFFFFA50 // PIOD Multi-driver Enable Register
#define AT91C_PIOD_IMR  	0xFFFFFA48 // PIOD Interrupt Mask Register
#define AT91C_PIOD_IER  	0xFFFFFA40 // PIOD Interrupt Enable Register
#define AT91C_PIOD_ODSR 	0xFFFFFA38 // PIOD Output Data Status Register
#define AT91C_PIOD_SODR 	0xFFFFFA30 // PIOD Set Output Data Register
#define AT91C_PIOD_PER  	0xFFFFFA00 // PIOD PIO Enable Register
#define AT91C_PIOD_OWDR 	0xFFFFFAA4 // PIOD Output Write Disable Register
#define AT91C_PIOD_PPUER 	0xFFFFFA64 // PIOD Pull-up Enable Register
#define AT91C_PIOD_MDDR 	0xFFFFFA54 // PIOD Multi-driver Disable Register
#define AT91C_PIOD_ISR  	0xFFFFFA4C // PIOD Interrupt Status Register
#define AT91C_PIOD_IDR  	0xFFFFFA44 // PIOD Interrupt Disable Register
#define AT91C_PIOD_PDR  	0xFFFFFA04 // PIOD PIO Disable Register
#define AT91C_PIOD_ODR  	0xFFFFFA14 // PIOD Output Disable Registerr
#define AT91C_PIOD_OWSR 	0xFFFFFAA8 // PIOD Output Write Status Register
#define AT91C_PIOD_ABSR 	0xFFFFFA78 // PIOD AB Select Status Register
#define AT91C_PIOD_ASR  	0xFFFFFA70 // PIOD Select A Register
#define AT91C_PIOD_PPUSR 	0xFFFFFA68 // PIOD Pad Pull-up Status Register
#define AT91C_PIOD_PPUDR 	0xFFFFFA60 // PIOD Pull-up Disable Register
#define AT91C_PIOD_MDSR 	0xFFFFFA58 // PIOD Multi-driver Status Register
#define AT91C_PIOD_PSR  	0xFFFFFA08 // PIOD PIO Status Register
#define AT91C_PIOD_OER  	0xFFFFFA10 // PIOD Output Enable Register
#define AT91C_PIOD_OSR  	0xFFFFFA18 // PIOD Output Status Register
#define AT91C_PIOD_IFER 	0xFFFFFA20 // PIOD Input Filter Enable Register
#define AT91C_PIOD_BSR  	0xFFFFFA74 // PIOD Select B Register
#define AT91C_PIOD_IFDR 	0xFFFFFA24 // PIOD Input Filter Disable Register
#define AT91C_PIOD_IFSR 	0xFFFFFA28 // PIOD Input Filter Status Register
// ========== Register definition for PIOC peripheral ========== 
#define AT91C_PIOC_IFDR 	0xFFFFF824 // PIOC Input Filter Disable Register
#define AT91C_PIOC_ODR  	0xFFFFF814 // PIOC Output Disable Registerr
#define AT91C_PIOC_ABSR 	0xFFFFF878 // PIOC AB Select Status Register
#define AT91C_PIOC_SODR 	0xFFFFF830 // PIOC Set Output Data Register
#define AT91C_PIOC_IFSR 	0xFFFFF828 // PIOC Input Filter Status Register
#define AT91C_PIOC_CODR 	0xFFFFF834 // PIOC Clear Output Data Register
#define AT91C_PIOC_ODSR 	0xFFFFF838 // PIOC Output Data Status Register
#define AT91C_PIOC_IER  	0xFFFFF840 // PIOC Interrupt Enable Register
#define AT91C_PIOC_IMR  	0xFFFFF848 // PIOC Interrupt Mask Register
#define AT91C_PIOC_OWDR 	0xFFFFF8A4 // PIOC Output Write Disable Register
#define AT91C_PIOC_MDDR 	0xFFFFF854 // PIOC Multi-driver Disable Register
#define AT91C_PIOC_PDSR 	0xFFFFF83C // PIOC Pin Data Status Register
#define AT91C_PIOC_IDR  	0xFFFFF844 // PIOC Interrupt Disable Register
#define AT91C_PIOC_ISR  	0xFFFFF84C // PIOC Interrupt Status Register
#define AT91C_PIOC_PDR  	0xFFFFF804 // PIOC PIO Disable Register
#define AT91C_PIOC_OWSR 	0xFFFFF8A8 // PIOC Output Write Status Register
#define AT91C_PIOC_OWER 	0xFFFFF8A0 // PIOC Output Write Enable Register
#define AT91C_PIOC_ASR  	0xFFFFF870 // PIOC Select A Register
#define AT91C_PIOC_PPUSR 	0xFFFFF868 // PIOC Pad Pull-up Status Register
#define AT91C_PIOC_PPUDR 	0xFFFFF860 // PIOC Pull-up Disable Register
#define AT91C_PIOC_MDSR 	0xFFFFF858 // PIOC Multi-driver Status Register
#define AT91C_PIOC_MDER 	0xFFFFF850 // PIOC Multi-driver Enable Register
#define AT91C_PIOC_IFER 	0xFFFFF820 // PIOC Input Filter Enable Register
#define AT91C_PIOC_OSR  	0xFFFFF818 // PIOC Output Status Register
#define AT91C_PIOC_OER  	0xFFFFF810 // PIOC Output Enable Register
#define AT91C_PIOC_PSR  	0xFFFFF808 // PIOC PIO Status Register
#define AT91C_PIOC_PER  	0xFFFFF800 // PIOC PIO Enable Register
#define AT91C_PIOC_BSR  	0xFFFFF874 // PIOC Select B Register
#define AT91C_PIOC_PPUER 	0xFFFFF864 // PIOC Pull-up Enable Register
// ========== Register definition for PIOB peripheral ========== 
#define AT91C_PIOB_OWSR 	0xFFFFF6A8 // PIOB Output Write Status Register
#define AT91C_PIOB_PPUSR 	0xFFFFF668 // PIOB Pad Pull-up Status Register
#define AT91C_PIOB_PPUDR 	0xFFFFF660 // PIOB Pull-up Disable Register
#define AT91C_PIOB_MDSR 	0xFFFFF658 // PIOB Multi-driver Status Register
#define AT91C_PIOB_MDER 	0xFFFFF650 // PIOB Multi-driver Enable Register
#define AT91C_PIOB_IMR  	0xFFFFF648 // PIOB Interrupt Mask Register
#define AT91C_PIOB_OSR  	0xFFFFF618 // PIOB Output Status Register
#define AT91C_PIOB_OER  	0xFFFFF610 // PIOB Output Enable Register
#define AT91C_PIOB_PSR  	0xFFFFF608 // PIOB PIO Status Register
#define AT91C_PIOB_PER  	0xFFFFF600 // PIOB PIO Enable Register
#define AT91C_PIOB_BSR  	0xFFFFF674 // PIOB Select B Register
#define AT91C_PIOB_PPUER 	0xFFFFF664 // PIOB Pull-up Enable Register
#define AT91C_PIOB_IFDR 	0xFFFFF624 // PIOB Input Filter Disable Register
#define AT91C_PIOB_ODR  	0xFFFFF614 // PIOB Output Disable Registerr
#define AT91C_PIOB_ABSR 	0xFFFFF678 // PIOB AB Select Status Register
#define AT91C_PIOB_ASR  	0xFFFFF670 // PIOB Select A Register
#define AT91C_PIOB_IFER 	0xFFFFF620 // PIOB Input Filter Enable Register
#define AT91C_PIOB_IFSR 	0xFFFFF628 // PIOB Input Filter Status Register
#define AT91C_PIOB_SODR 	0xFFFFF630 // PIOB Set Output Data Register
#define AT91C_PIOB_ODSR 	0xFFFFF638 // PIOB Output Data Status Register
#define AT91C_PIOB_CODR 	0xFFFFF634 // PIOB Clear Output Data Register
#define AT91C_PIOB_PDSR 	0xFFFFF63C // PIOB Pin Data Status Register
#define AT91C_PIOB_OWER 	0xFFFFF6A0 // PIOB Output Write Enable Register
#define AT91C_PIOB_IER  	0xFFFFF640 // PIOB Interrupt Enable Register
#define AT91C_PIOB_OWDR 	0xFFFFF6A4 // PIOB Output Write Disable Register
#define AT91C_PIOB_MDDR 	0xFFFFF654 // PIOB Multi-driver Disable Register
#define AT91C_PIOB_ISR  	0xFFFFF64C // PIOB Interrupt Status Register
#define AT91C_PIOB_IDR  	0xFFFFF644 // PIOB Interrupt Disable Register
#define AT91C_PIOB_PDR  	0xFFFFF604 // PIOB PIO Disable Register
// ========== Register definition for PIOA peripheral ========== 
#define AT91C_PIOA_IMR  	0xFFFFF448 // PIOA Interrupt Mask Register
#define AT91C_PIOA_IER  	0xFFFFF440 // PIOA Interrupt Enable Register
#define AT91C_PIOA_OWDR 	0xFFFFF4A4 // PIOA Output Write Disable Register
#define AT91C_PIOA_ISR  	0xFFFFF44C // PIOA Interrupt Status Register
#define AT91C_PIOA_PPUDR 	0xFFFFF460 // PIOA Pull-up Disable Register
#define AT91C_PIOA_MDSR 	0xFFFFF458 // PIOA Multi-driver Status Register
#define AT91C_PIOA_MDER 	0xFFFFF450 // PIOA Multi-driver Enable Register
#define AT91C_PIOA_PER  	0xFFFFF400 // PIOA PIO Enable Register
#define AT91C_PIOA_PSR  	0xFFFFF408 // PIOA PIO Status Register
#define AT91C_PIOA_OER  	0xFFFFF410 // PIOA Output Enable Register
#define AT91C_PIOA_BSR  	0xFFFFF474 // PIOA Select B Register
#define AT91C_PIOA_PPUER 	0xFFFFF464 // PIOA Pull-up Enable Register
#define AT91C_PIOA_MDDR 	0xFFFFF454 // PIOA Multi-driver Disable Register
#define AT91C_PIOA_PDR  	0xFFFFF404 // PIOA PIO Disable Register
#define AT91C_PIOA_ODR  	0xFFFFF414 // PIOA Output Disable Registerr
#define AT91C_PIOA_IFDR 	0xFFFFF424 // PIOA Input Filter Disable Register
#define AT91C_PIOA_ABSR 	0xFFFFF478 // PIOA AB Select Status Register
#define AT91C_PIOA_ASR  	0xFFFFF470 // PIOA Select A Register
#define AT91C_PIOA_PPUSR 	0xFFFFF468 // PIOA Pad Pull-up Status Register
#define AT91C_PIOA_ODSR 	0xFFFFF438 // PIOA Output Data Status Register
#define AT91C_PIOA_SODR 	0xFFFFF430 // PIOA Set Output Data Register
#define AT91C_PIOA_IFSR 	0xFFFFF428 // PIOA Input Filter Status Register
#define AT91C_PIOA_IFER 	0xFFFFF420 // PIOA Input Filter Enable Register
#define AT91C_PIOA_OSR  	0xFFFFF418 // PIOA Output Status Register
#define AT91C_PIOA_IDR  	0xFFFFF444 // PIOA Interrupt Disable Register
#define AT91C_PIOA_PDSR 	0xFFFFF43C // PIOA Pin Data Status Register
#define AT91C_PIOA_CODR 	0xFFFFF434 // PIOA Clear Output Data Register
#define AT91C_PIOA_OWSR 	0xFFFFF4A8 // PIOA Output Write Status Register
#define AT91C_PIOA_OWER 	0xFFFFF4A0 // PIOA Output Write Enable Register
// ========== Register definition for DBGU peripheral ========== 
#define AT91C_DBGU_C2R  	0xFFFFF244 // DBGU Chip ID2 Register
#define AT91C_DBGU_THR  	0xFFFFF21C // DBGU Transmitter Holding Register
#define AT91C_DBGU_CSR  	0xFFFFF214 // DBGU Channel Status Register
#define AT91C_DBGU_IDR  	0xFFFFF20C // DBGU Interrupt Disable Register
#define AT91C_DBGU_MR   	0xFFFFF204 // DBGU Mode Register
#define AT91C_DBGU_FNTR 	0xFFFFF248 // DBGU Force NTRST Register
#define AT91C_DBGU_C1R  	0xFFFFF240 // DBGU Chip ID1 Register
#define AT91C_DBGU_BRGR 	0xFFFFF220 // DBGU Baud Rate Generator Register
#define AT91C_DBGU_RHR  	0xFFFFF218 // DBGU Receiver Holding Register
#define AT91C_DBGU_IMR  	0xFFFFF210 // DBGU Interrupt Mask Register
#define AT91C_DBGU_IER  	0xFFFFF208 // DBGU Interrupt Enable Register
#define AT91C_DBGU_CR   	0xFFFFF200 // DBGU Control Register
// ========== Register definition for PDC_DBGU peripheral ========== 
#define AT91C_DBGU_TNCR 	0xFFFFF31C // PDC_DBGU Transmit Next Counter Register
#define AT91C_DBGU_RNCR 	0xFFFFF314 // PDC_DBGU Receive Next Counter Register
#define AT91C_DBGU_PTCR 	0xFFFFF320 // PDC_DBGU PDC Transfer Control Register
#define AT91C_DBGU_PTSR 	0xFFFFF324 // PDC_DBGU PDC Transfer Status Register