buzzer.v

蜂鸣器控制

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//  本设计在RicHic开发系统中验证通过
//

module buzzer(
	clk,
	rst_n,
	led,
	sp
	);
output	        sp;
output  [2:0]   led;

input	        clk;
input	        rst_n; // synthesis attribute clock_buffer of rst_n is ibufg;

reg		[27:0]	cnt;
  always @ ( posedge clk or negedge rst_n)
    if (!rst_n)
 	    cnt <= 28'd0;
    else
 	    cnt <= cnt + 1;

reg             sp;
  always @ (cnt[24:23])
    case (cnt[24:23])
        2'b00: sp = cnt[20];
        2'b01: sp = cnt[18];
        2'b11: sp = cnt[16];
        2'b11: sp = cnt[14];
        default:sp = 1'b0;
    endcase     

reg     [1:0] led_cnt;
 always @ ( posedge cnt[24] or negedge rst_n )
    if (!rst_n)
        led_cnt <= 2'b00;
    else if (led_cnt == 2'b10)
        led_cnt <= 2'b00;
    else    
        led_cnt <= led_cnt + 1'b1;
        
assign led[0] = led_cnt == 2'b00;
assign led[1] = led_cnt == 2'b01;
assign led[2] = led_cnt == 2'b10;

endmodule