📄 lcddram.lst
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403 4 do{k++; WatchDog = !WatchDog;}while(k<800);
404 4 }
405 3
406 3 // do{}while(busy==0);
407 3 EA=1;
408 3 XBYTE[0XC409]=0;
409 3 cpu_fpga_set(0x95,0x5242+j,98); //发送到fpga
410 3 break;
411 3 case 0x96:j=(idcode-1)*41; //设置控制方案
412 3 EA=0;
413 3 for(i=0;i<41;i++){
414 4 XBYTE[0x5e82+i+j]=XBYTE[0XC410+i];
415 4 k=eeprom_addr;
416 4 k=k+i+j+0xe82;
417 4 XBYTE[k]=XBYTE[0x5e82+i+j];
418 4 k=0;
419 4 do{k++;}while(k<800);
420 4 }
421 3 // do{}while(busy==0);
422 3 EA=1;
423 3 XBYTE[0XC409]=0;
424 3 cpu_fpga_set(0x96,0x5e82+j,41); //发送到fpga
C51 COMPILER V6.02 LCDDRAM 09/28/2006 21:46:50 PAGE 8
425 3 break;
426 3 // case 0x97：break;
427 3 case 0x98:j=(idcode-1)*74; //设置计划
428 3 EA=0;
429 3 for(i=0;i<74;i++){
430 4 // do{}while(busy==0);
431 4 XBYTE[0x63A2+i+j]=XBYTE[0XC410+i];
432 4 k=eeprom_addr;
433 4 k=k+i+j+0x13a2;
434 4 XBYTE[k]=XBYTE[0x63A2+i+j];
435 4 k=0;
436 4 do{k++; WatchDog = !WatchDog;}while(k<800);
437 4 } EA=1;
438 3 XBYTE[0XC409]=0;
439 3 cpu_fpga_set(0x98,0x63a2+j,74); //发送到fpga
440 3 break;
441 3 case 0x99: j=XBYTE[0XC40c];
442 3 j=(j-1)*6; EA=0;
443 3 for(i=0;i<6;i++){ //设置日计划调度表
444 4 // do{}while(busy==0);
445 4 XBYTE[0x6cE2+i+j]=XBYTE[0XC410+i];
446 4 k=eeprom_addr;
447 4 k=k+i+j+0x1ce2;
448 4 XBYTE[k]=XBYTE[0x6ce2+i+j];
449 4 k=0;
450 4 do{k++; WatchDog = !WatchDog;}while(k<800);
451 4 }EA=1;
452 3 //do{}while(busy==0);
453 3 XBYTE[0XC409]=0;
454 3 cpu_fpga_set(0x99,0x6ce2,60); //发送到fpga
455 3 break;
456 3 // case 0x9a：break;
457 3 // case 0x9b：break;
458 3 // case 0x9c：break;
459 3 // case 0x9d：break;
460 3 case 0x9e://do{}while(busy==0);XBYTE[0XC410]=0xde; //遥控阶段对应表
461 3 // do{}while(busy==0);
462 3 XBYTE[0X6d28]=XBYTE[0XC410];
463 3 // do{}while(busy==0);
464 3 XBYTE[0X6d29]=XBYTE[0XC411];
465 3
466 3 // do{}while(busy==0);
467 3 XBYTE[0XC409]=0;
468 3 break;
469 3 case 0x9f:switch(idcode){
470 4 case 0x02:for(i=0;i<5;i++){//开关机时间，关机后状态
471 5 // do{}while(busy==0);
472 5 XBYTE[0X801A+i]=XBYTE[0XC410+i];
473 5 }
474 4 //do{}while(busy==0);
475 4 XBYTE[0X8000]=XBYTE[0XC415]; //路口编号
476 4 //do{}while(busy==0);
477 4 XBYTE[0X8001]=XBYTE[0Xc416];
478 4 //do{}while(busy==0);
479 4 XBYTE[0X8008]=XBYTE[0XC417]; //主从标志
480 4 for(i=0;i<17;i++){
481 5 //do{}while(busy==0);
482 5 XBYTE[0X8009+i]=XBYTE[0XC418+i];
483 5 }
484 4 //do{}while(busy==0);
485 4 XBYTE[0X801f]=XBYTE[0XC418+i];
486 4 i++;
C51 COMPILER V6.02 LCDDRAM 09/28/2006 21:46:50 PAGE 9
487 4 //do{}while(busy==0);
488 4 XBYTE[0X8020]=XBYTE[0XC418+i];
489 4 i++;
490 4 //do{}while(busy==0);
491 4 XBYTE[0X8021]=XBYTE[0XC418+i];
492 4
493 4 //do{}while(busy==0);
494 4 XBYTE[0XC409]=0;
495 4 break;
496 4 case 0x0d:for(i=0;i<8;i++){
497 5 //do{}while(busy==0);
498 5 XBYTE[0X6d20+i]=XBYTE[0XC410+i];
499 5 }
500 4 //do{}while(busy==0);
501 4 XBYTE[0XC409]=0;
502 4 break;
503 4 default:break;
504 4 }
505 3 default:break;
506 3 }
507 2 // EA=1;
508 2 }
509 1
510 1 return 1;
511 1 }
C51 COMPILER V6.02 LCDDRAM 09/28/2006 21:46:50 PAGE 10
NAME CLASS MSPACE TYPE OFFSET SIZE
==== ===== ====== ==== ====== ====
P1 . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0090H 1
tr_flagaddr. . . . . . . . . . . . . . EXTERN XDATA U_INT ----- 2
T0 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B4H 1
AC . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D6H 1
T1 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B5H 1
EA . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00AFH 1
WatchDog . . . . . . . . . . . . . . . ABSBIT ----- BIT 0093H 1
RD . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B7H 1
ES . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00ACH 1
RI . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0098H 1
INT0 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B2H 1
CY . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D7H 1
TI . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0099H 1
INT1 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B3H 1
led82. . . . . . . . . . . . . . . . . EXTERN XDATA ARRAY ----- 5
led83. . . . . . . . . . . . . . . . . EXTERN XDATA ARRAY ----- 30
PS . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BCH 1
step_counter . . . . . . . . . . . . . EXTERN XDATA U_CHAR ----- 1
OV . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D2H 1
WR . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B6H 1
utemp. . . . . . . . . . . . . . . . . PUBLIC XDATA U_INT 0000H 2
IE0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0089H 1
IE1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008BH 1
busy . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0095H 1
ET0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A9H 1
ET1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00ABH 1
TF0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008DH 1
ch . . . . . . . . . . . . . . . . . . PUBLIC XDATA ARRAY 0002H 100
TF1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008FH 1
RB8. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009AH 1
ttd. . . . . . . . . . . . . . . . . . PUBLIC XDATA U_CHAR 0066H 1
EX0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A8H 1
IT0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0088H 1
TB8. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009BH 1
EX1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00AAH 1
IT1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008AH 1
P. . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D0H 1
SM0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009FH 1
SM1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009EH 1
SM2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009DH 1
deal_lcddram . . . . . . . . . . . . . PUBLIC CODE PROC 0000H -----
flag . . . . . . . . . . . . . . . . AUTO XDATA U_CHAR 0000H 1
tq . . . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0007H 1
id . . . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0001H 1
fu . . . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0003H 1
idcode . . . . . . . . . . . . . . . AUTO XDATA U_CHAR 0001H 1
i. . . . . . . . . . . . . . . . . . AUTO XDATA U_INT 0002H 2
j. . . . . . . . . . . . . . . . . . AUTO XDATA U_INT 0004H 2
k. . . . . . . . . . . . . . . . . . AUTO XDATA U_INT 0006H 2
num. . . . . . . . . . . . . . . . . AUTO XDATA U_INT 0008H 2
addr . . . . . . . . . . . . . . . . AUTO XDATA U_INT 000AH 2
PT0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B9H 1
PT1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BBH 1
RS0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D3H 1
TR0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008CH 1
RS1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D4H 1
TR1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008EH 1
C51 COMPILER V6.02 LCDDRAM 09/28/2006 21:46:50 PAGE 11
NAME CLASS MSPACE TYPE OFFSET SIZE
==== ===== ====== ==== ====== ====
_cpu_fpga_set. . . . . . . . . . . . . PUBLIC CODE PROC 0000H -----
flag . . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0001H 1
ptr. . . . . . . . . . . . . . . . . AUTO XDATA U_INT 0000H 2
len. . . . . . . . . . . . . . . . . AUTO XDATA U_INT 0002H 2
i. . . . . . . . . . . . . . . . . . AUTO XDATA U_INT 0004H 2
PX0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B8H 1
PX1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BAH 1
run_state. . . . . . . . . . . . . . . PUBLIC XDATA U_CHAR 0067H 1
REN. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009CH 1
data_address . . . . . . . . . . . . . EXTERN XDATA U_INT ----- 2
tt . . . . . . . . . . . . . . . . . . PUBLIC XDATA U_CHAR 0068H 1
address. . . . . . . . . . . . . . . . EXTERN XDATA U_INT ----- 2
RXD. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B0H 1
step_num . . . . . . . . . . . . . . . EXTERN XDATA U_CHAR ----- 1
TXD. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B1H 1
F0 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D5H 1
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 5369 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = 105 18
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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