test_ddr_command.fdo

来自「一个小测试程序希望,朋友有所帮助,赶快下吧@@!!VERILOG」· FDO 代码 · 共 15 行

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Tue Aug 14 10:56:52 中国标准时间 2007
##
vlib work
vlog  ddr_command.v
vlog  test_ddr_command.tfw
vlog  "E:/Xilinx6.1i/verilog/src/glbl.v"
vsim -t 1ps  -L xilinxcorelib_ver -L unisims_ver  -lib work test_ddr_command glbl
do test_ddr_command.udo
view wave
add wave *
view structure
view signals
run -all