transcript

一个小测试程序希望,朋友有所帮助,赶快下吧@@!!VERILOG

# Reading D:/Modeltech_xe/tcl/vsim/pref.tcl 
# do test_ddr_command.ndo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim XE III vlog 6.1e Compiler 2006.03 Mar  8 2006
# -- Compiling module glbl
# 
# Top level modules:
# 	glbl
# Model Technology ModelSim XE III vlog 6.1e Compiler 2006.03 Mar  8 2006
# -- Compiling module ddr_command
# 
# Top level modules:
# 	ddr_command
# Model Technology ModelSim XE III vlog 6.1e Compiler 2006.03 Mar  8 2006
# -- Compiling module test_ddr_command
# 
# Top level modules:
# 	test_ddr_command
# vsim -L simprims_ver -lib work -t 1ps test_ddr_command glbl 
# Loading work.test_ddr_command
# Loading work.ddr_command
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_SFF
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_LUT3
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_ONE
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_LUT2
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_LUT4
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_FF
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_SRL16E
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_ZERO
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_BUF
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_IPAD
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_OPAD
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_CKBUF
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_OR2
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_TRI
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.X_INV
# Loading work.glbl
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.sffsrce
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.x_lut3_mux4
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.x_lut2_mux4
# Loading d:\Modeltech_xe\win32xoem/../xilinx/verilog/simprims_ver.ffsrce
# .main_pane.mdi.interior.cs.vm.paneset.cli_0.wf.clip.cs.pw.wf
# .main_pane.workspace
# .main_pane.signals.interior.cs
# No errors or warnings
# Break at test_ddr_command.translate_tfw line 205
# Simulation Breakpoint: Break at test_ddr_command.translate_tfw line 205
# MACRO ./test_ddr_command.ndo PAUSED at line 15