test_ddr_command.translate_tfw

一个小测试程序希望,朋友有所帮助,赶快下吧@@!!VERILOG

// F:\ISE_TEST
// Verilog Test fixture created by
// HDL Bencher 6.1i
// Tue Aug 14 11:42:21 2007
// 
// Notes:
// 1) This test fixture has been automatically generated from
//   your Test Bench Waveform
// 2) To use this as a user modifiable test fixture do the following:
//   - Save it as a file with a .tf extension (i.e. File->Save As...)
//   - Add it to your project as a testbench source (i.e. Project->Add Source...)
// 

`timescale 1ns/1ns

`define F_DEASSERT	4
`define C_NOP	7
`define IF2	3
`define IF1	2
`define FDEPTH	4
`define C_P_CHRG	2
`define s1	1
`define D	10
`define N	5
`define s2	2
`define s4	4
`define C_ACTIVE	3
`define FCWIDTH	2
`define IF0	1
`define FWIDTH	32
`define OD	4
`define BR0	0
`define F_ASSERT	2
`define C_REFRSH	1
`define F_IDLE	1
`define s0	0
`define C_READ	5
`define C_L_MODE	0
`define Q	25
`define state_delay	6
`define C_WRITE	4
`define TCKO	0
`define s3	3
`define s0	0
`define C_L_MODE	0
`define FWIDTH	32
`define RES	5
`define IF1	2
`define IF1	2
`define FWIDTH	32
`define IF1	2
`define IF1	2
`define RES	5
`define FCWIDTH	2
`define s3	3
`define s2	2
`define F_DEASSERT	4
`define s2	2
`define s2	2
`define F_DEASSERT	4
`define C_ACTIVE	3
`define C_L_MODE	0
`define C_L_MODE	0
`define RES	5
`define D	10
`define F_DEASSERT	4
`define C_ACTIVE	3
`define C_NOP	7
`define RES	5
`define IF2	3
`define D	10
`define C_ACTIVE	3
`define F_IDLE	1
`define F_ASSERT	2
`define Q	25
`define N	5

module test_ddr_command;
	reg CLK;
	reg RESET_N;
	reg [21:0] SADDR;
	reg NOP;
	reg READA;
	reg WRITEA;
	reg REFRESH;
	reg PRECHARGE;
	reg LOAD_MODE;
	reg [1:0] SC_CL;
	reg [1:0] SC_RC;
	reg [3:0] SC_RRD;
	reg SC_PM;
	reg [3:0] SC_BL;
	reg REF_REQ;
	wire REF_ACK;
	wire CM_ACK;
	wire OE;
	wire [11:0] SA;
	wire [1:0] BA;
	wire [1:0] CS_N;
	wire CKE;
	wire RAS_N;
	wire CAS_N;
	wire WE_N;
	wire do_nop;
	wire do_reada;
	wire do_writea;
	wire do_refresh;
	wire do_precharge;
	wire do_load_mode;

	ddr_command UUT (
		.CLK(CLK),
		.RESET_N(RESET_N),
		.SADDR(SADDR),
		.NOP(NOP),
		.READA(READA),
		.WRITEA(WRITEA),
		.REFRESH(REFRESH),
		.PRECHARGE(PRECHARGE),
		.LOAD_MODE(LOAD_MODE),
		.SC_CL(SC_CL),
		.SC_RC(SC_RC),
		.SC_RRD(SC_RRD),
		.SC_PM(SC_PM),
		.SC_BL(SC_BL),
		.REF_REQ(REF_REQ),
		.REF_ACK(REF_ACK),
		.CM_ACK(CM_ACK),
		.OE(OE),
		.SA(SA),
		.BA(BA),
		.CS_N(CS_N),
		.CKE(CKE),
		.RAS_N(RAS_N),
		.CAS_N(CAS_N),
		.WE_N(WE_N),
		.do_nop(do_nop),
		.do_reada(do_reada),
		.do_writea(do_writea),
		.do_refresh(do_refresh),
		.do_precharge(do_precharge),
		.do_load_mode(do_load_mode)
	);

	integer TX_FILE;
	integer TX_ERROR;

always
begin 			//clock process
	CLK = 1'b0;
	#10
	CLK = 1'b1;
	#10
	#40
	CLK = 1'b0;
	#40
	CLK = 1'b0;
end

initial
begin
	TX_ERROR=0;
	TX_FILE=$fopen("results.txt");

	// --------------------
	RESET_N = 1'b1;
	SADDR = 22'b0000000000000000000000; //0
	NOP = 1'b0;
	READA = 1'b0;
	WRITEA = 1'b0;
	REFRESH = 1'b0;
	PRECHARGE = 1'b0;
	LOAD_MODE = 1'b0;
	SC_CL = 2'b00; //0
	SC_RC = 2'b00; //0
	SC_RRD = 4'b0000; //0
	SC_PM = 1'b0;
	SC_BL = 4'b0000; //0
	REF_REQ = 1'b0;
	// --------------------
	#100 // Time=100 ns
	RESET_N = 1'b0;
	// --------------------
	#100 // Time=200 ns
	RESET_N = 1'b1;
	// --------------------
	#300 // Time=500 ns
	PRECHARGE = 1'b1;
	// --------------------
	#100 // Time=600 ns
	PRECHARGE = 1'b0;
	// --------------------
	#110 // Time=710 ns
	// --------------------

	if (TX_ERROR == 0) begin
		$display("No errors or warnings");
		$fdisplay(TX_FILE,"No errors or warnings");
	end else begin
		$display("%d errors found in simulation",TX_ERROR);
		$fdisplay(TX_FILE,"%d errors found in simulation",TX_ERROR);
	end

	$fclose(TX_FILE);
	$stop;

end

task CHECK_REF_ACK;
	input NEXT_REF_ACK;

	#0 begin
		if (NEXT_REF_ACK !== REF_ACK) begin
			$display("Error at time=%dns REF_ACK=%b, expected=%b",
				$time, REF_ACK, NEXT_REF_ACK);
			$fdisplay(TX_FILE,"Error at time=%dns REF_ACK=%b, expected=%b",
				$time, REF_ACK, NEXT_REF_ACK);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_CM_ACK;
	input NEXT_CM_ACK;

	#0 begin
		if (NEXT_CM_ACK !== CM_ACK) begin
			$display("Error at time=%dns CM_ACK=%b, expected=%b",
				$time, CM_ACK, NEXT_CM_ACK);
			$fdisplay(TX_FILE,"Error at time=%dns CM_ACK=%b, expected=%b",
				$time, CM_ACK, NEXT_CM_ACK);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_OE;
	input NEXT_OE;

	#0 begin
		if (NEXT_OE !== OE) begin
			$display("Error at time=%dns OE=%b, expected=%b",
				$time, OE, NEXT_OE);
			$fdisplay(TX_FILE,"Error at time=%dns OE=%b, expected=%b",
				$time, OE, NEXT_OE);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_SA;
	input [11:0] NEXT_SA;

	#0 begin
		if (NEXT_SA !== SA) begin
			$display("Error at time=%dns SA=%b, expected=%b",
				$time, SA, NEXT_SA);
			$fdisplay(TX_FILE,"Error at time=%dns SA=%b, expected=%b",
				$time, SA, NEXT_SA);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_BA;
	input [1:0] NEXT_BA;

	#0 begin
		if (NEXT_BA !== BA) begin
			$display("Error at time=%dns BA=%b, expected=%b",
				$time, BA, NEXT_BA);
			$fdisplay(TX_FILE,"Error at time=%dns BA=%b, expected=%b",
				$time, BA, NEXT_BA);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_CS_N;
	input [1:0] NEXT_CS_N;

	#0 begin
		if (NEXT_CS_N !== CS_N) begin
			$display("Error at time=%dns CS_N=%b, expected=%b",
				$time, CS_N, NEXT_CS_N);
			$fdisplay(TX_FILE,"Error at time=%dns CS_N=%b, expected=%b",
				$time, CS_N, NEXT_CS_N);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_CKE;
	input NEXT_CKE;

	#0 begin
		if (NEXT_CKE !== CKE) begin
			$display("Error at time=%dns CKE=%b, expected=%b",
				$time, CKE, NEXT_CKE);
			$fdisplay(TX_FILE,"Error at time=%dns CKE=%b, expected=%b",
				$time, CKE, NEXT_CKE);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_RAS_N;
	input NEXT_RAS_N;

	#0 begin
		if (NEXT_RAS_N !== RAS_N) begin
			$display("Error at time=%dns RAS_N=%b, expected=%b",
				$time, RAS_N, NEXT_RAS_N);
			$fdisplay(TX_FILE,"Error at time=%dns RAS_N=%b, expected=%b",
				$time, RAS_N, NEXT_RAS_N);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_CAS_N;
	input NEXT_CAS_N;

	#0 begin
		if (NEXT_CAS_N !== CAS_N) begin
			$display("Error at time=%dns CAS_N=%b, expected=%b",
				$time, CAS_N, NEXT_CAS_N);
			$fdisplay(TX_FILE,"Error at time=%dns CAS_N=%b, expected=%b",
				$time, CAS_N, NEXT_CAS_N);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_WE_N;
	input NEXT_WE_N;

	#0 begin
		if (NEXT_WE_N !== WE_N) begin
			$display("Error at time=%dns WE_N=%b, expected=%b",
				$time, WE_N, NEXT_WE_N);
			$fdisplay(TX_FILE,"Error at time=%dns WE_N=%b, expected=%b",
				$time, WE_N, NEXT_WE_N);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_do_nop;
	input NEXT_do_nop;

	#0 begin
		if (NEXT_do_nop !== do_nop) begin
			$display("Error at time=%dns do_nop=%b, expected=%b",
				$time, do_nop, NEXT_do_nop);
			$fdisplay(TX_FILE,"Error at time=%dns do_nop=%b, expected=%b",
				$time, do_nop, NEXT_do_nop);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_do_reada;
	input NEXT_do_reada;

	#0 begin
		if (NEXT_do_reada !== do_reada) begin
			$display("Error at time=%dns do_reada=%b, expected=%b",
				$time, do_reada, NEXT_do_reada);
			$fdisplay(TX_FILE,"Error at time=%dns do_reada=%b, expected=%b",
				$time, do_reada, NEXT_do_reada);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_do_writea;
	input NEXT_do_writea;

	#0 begin
		if (NEXT_do_writea !== do_writea) begin
			$display("Error at time=%dns do_writea=%b, expected=%b",
				$time, do_writea, NEXT_do_writea);
			$fdisplay(TX_FILE,"Error at time=%dns do_writea=%b, expected=%b",
				$time, do_writea, NEXT_do_writea);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_do_refresh;
	input NEXT_do_refresh;

	#0 begin
		if (NEXT_do_refresh !== do_refresh) begin
			$display("Error at time=%dns do_refresh=%b, expected=%b",
				$time, do_refresh, NEXT_do_refresh);
			$fdisplay(TX_FILE,"Error at time=%dns do_refresh=%b, expected=%b",
				$time, do_refresh, NEXT_do_refresh);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_do_precharge;
	input NEXT_do_precharge;

	#0 begin
		if (NEXT_do_precharge !== do_precharge) begin
			$display("Error at time=%dns do_precharge=%b, expected=%b",
				$time, do_precharge, NEXT_do_precharge);
			$fdisplay(TX_FILE,"Error at time=%dns do_precharge=%b, expected=%b",
				$time, do_precharge, NEXT_do_precharge);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

task CHECK_do_load_mode;
	input NEXT_do_load_mode;

	#0 begin
		if (NEXT_do_load_mode !== do_load_mode) begin
			$display("Error at time=%dns do_load_mode=%b, expected=%b",
				$time, do_load_mode, NEXT_do_load_mode);
			$fdisplay(TX_FILE,"Error at time=%dns do_load_mode=%b, expected=%b",
				$time, do_load_mode, NEXT_do_load_mode);
			TX_ERROR = TX_ERROR + 1;
		end
	end
endtask

endmodule