params.v

一个小测试程序希望,朋友有所帮助,赶快下吧@@!!VERILOG

// Address Space Parameters

`define ROWSTART        8           
`define ROWSIZE         12
`define COLSTART        0
`define COLSIZE         8
`define BANKSTART       19
`define BANKSIZE        2

// Address and Data Bus Sizes

`define ASIZE           22      // total address width of the SDRAM
`define DSIZE         128       // Width of data bus to SDRAMS