test_ddr_command.ndo

一个小测试程序希望,朋友有所帮助,赶快下吧@@!!VERILOG

## NOTE: Do not edit this file.
## Auto generated by Project Navigator for Verilog Post-Translate Simulation
##
vlib work
## Compile Post-Translate Model for Module ddr_command
vlog  "E:/Xilinx6.1i/verilog/src/glbl.v"
vlog  ddr_command_translate.v
vlog  test_ddr_command.translate_tfw
vsim -t 1ps   -L simprims_ver  -lib work test_ddr_command glbl
do test_ddr_command.udo
view wave
add wave *
view structure
view signals
run -all
## End