hardware.c

MICREL 网卡驱动 FOR CE 5.0

*/

#ifdef KS_PCI_BUS
void HardwareAcknowledgeReceive_PCI
#else
void HardwareAcknowledgeReceive_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    HW_WRITE_DWORD( pHardware, REG_INTERRUPTS_STATUS, INT_RX );

#else
    /* Acknowledge the Receive interrupt. */
#ifdef SH_32BIT_ACCESS_ONLY
    HardwareWriteIntStat( pHardware, INT_STATUS( INT_RX ));
#else
    HardwareWriteRegWord( pHardware, REG_INT_STATUS_BANK, REG_INT_STATUS_OFFSET,
        INT_RX );
#endif

#endif
}  /* HardwareAcknowledgeReceive */

#endif


/*
    HardwareStartReceive

    Description:
        This routine starts the receive function of the hardware.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareStartReceive_PCI
#else
void HardwareStartReceive_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    HW_WRITE_DWORD( pHardware, REG_DMA_RX_CTRL,
        pHardware->m_dwReceiveConfig );

    /* Notify when the receive stops. */
    pHardware->m_ulInterruptMask |= INT_RX_STOPPED;
    HW_WRITE_DWORD( pHardware, REG_DMA_RX_START, DMA_START );
    pHardware->m_bReceiveStop++;

    /* Variable overflows. */
    if ( 0 == pHardware->m_bReceiveStop )
        pHardware->m_bReceiveStop = 2;

#else
    HardwareWriteRegWord( pHardware, REG_RX_CTRL_BANK, REG_RX_CTRL_OFFSET,
        pHardware->m_wReceiveConfig );

    /* Clear the receive stopped interrupt status. */
#ifdef SH_32BIT_ACCESS_ONLY
    HardwareWriteIntStat( pHardware, INT_STATUS( INT_RX_STOPPED ));
#else
    HardwareWriteRegWord( pHardware, REG_INT_STATUS_BANK,
        REG_INT_STATUS_OFFSET, INT_RX_STOPPED );
#endif

#ifdef DBG
    /* Notify when the receive stops. */
    pHardware->m_wInterruptMask |= INT_RX_STOPPED;
#endif
#endif
}  /* HardwareStartReceive */


/*
    HardwareStopReceive

    Description:
        This routine stops the receive function of the hardware.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareStopReceive_PCI
#else
void HardwareStopReceive_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    pHardware->m_bReceiveStop = 0;
    HW_WRITE_DWORD( pHardware, REG_DMA_RX_CTRL,
                    (pHardware->m_dwReceiveConfig & ~DMA_RX_CTRL_ENABLE ) );

#else

    /* Interrupt will always trigger if not stopped. */
    HardwareTurnOffInterrupt( pHardware, INT_RX_STOPPED );
    HardwareDisableInterruptBit( pHardware, INT_RX_STOPPED );
    HardwareWriteRegWord( pHardware, REG_RX_CTRL_BANK, REG_RX_CTRL_OFFSET,
        0 );
#endif
}  /* HardwareStopReceive */

/* -------------------------------------------------------------------------- */

/*
    Transmit processing primary routines
*/

#ifndef INLINE
/*
    HardwareAcknowledgeTransmit

    Description:
        This routine acknowledges the trasnmit interrupt.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareAcknowledgeTransmit_PCI
#else
void HardwareAcknowledgeTransmit_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    HW_WRITE_DWORD( pHardware, REG_INTERRUPTS_STATUS, INT_TX );

#else
    /* Acknowledge the interrupt and remove the packet from TX FIFO. */
#ifdef SH_32BIT_ACCESS_ONLY
    HardwareWriteIntStat( pHardware, INT_STATUS( INT_TX ));
#else
    HardwareWriteRegWord( pHardware, REG_INT_STATUS_BANK, REG_INT_STATUS_OFFSET,
        INT_TX );
#endif

#endif
}  /* HardwareAcknowledgeTransmit */
#endif


/*
    HardwareStartTransmit

    Description:
        This routine starts the transmit function of the hardware.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareStartTransmit_PCI
#else
void HardwareStartTransmit_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    HW_WRITE_DWORD( pHardware, REG_DMA_TX_CTRL,
        pHardware->m_dwTransmitConfig );

#ifdef DEVELOP
{
    PTDescInfo pDescInfo = &pHardware->m_TxDescInfo;
    ULONG      ulIntStatus;
    int        i;
    int        timeout;
    PTDesc     pCurrent = pDescInfo->pRing;

    /* Find out the current descriptor pointed by hardware. */
    for ( i = 0; i < pDescInfo->cnAlloc - 1; i++ )
    {
        /* This descriptor will be skipped. */
        pCurrent->phw->BufSize.ulData = 0;
        pCurrent->sw.Control.tx.fHWOwned = TRUE;
        pCurrent->phw->Control.ulData =
            CPU_TO_LE32( pCurrent->sw.Control.ulData );
        pCurrent++;
    }

    /* Stop at the last descriptor. */
    pCurrent->sw.Control.tx.fHWOwned = FALSE;
    pCurrent->phw->Control.ulData =
        CPU_TO_LE32( pCurrent->sw.Control.ulData );

    /* Let the hardware goes through the descriptors. */
    HW_WRITE_DWORD( pHardware, REG_DMA_TX_START, DMA_START );

    timeout = 10;
    do {
        DelayMillisec( 10 );
        HardwareReadInterrupt( pHardware, &ulIntStatus );
    } while ( !( ulIntStatus & INT_TX_EMPTY )  &&  timeout-- );
    if ( !( ulIntStatus & INT_TX_EMPTY ) ) {
        DBG_PRINT( "Tx not working!  Reset the hardware!"NEWLINE );
    }

    /* Acknowledge the interrupt. */
    HardwareAcknowledgeEmpty( pHardware );

    /* Last descriptor */
    pCurrent->sw.BufSize.tx.wBufSize = 0;
    pCurrent->phw->BufSize.ulData =
        CPU_TO_LE32( pCurrent->sw.BufSize.ulData );
    pCurrent->sw.Control.tx.fHWOwned = TRUE;
    pCurrent->phw->Control.ulData = CPU_TO_LE32( pCurrent->sw.Control.ulData );

    /* First descriptor */
    pCurrent = pDescInfo->pRing;
    pCurrent->sw.Control.tx.fHWOwned = FALSE;
    pCurrent->phw->Control.ulData =
        CPU_TO_LE32( pCurrent->sw.Control.ulData );

    /* Let the hardware goes to the first descriptor. */
    HW_WRITE_DWORD( pHardware, REG_DMA_TX_START, DMA_START );

    timeout = 10;
    do {
        DelayMillisec( 10 );
        HardwareReadInterrupt( pHardware, &ulIntStatus );
    } while ( !( ulIntStatus & INT_TX_EMPTY )  &&  timeout-- );
    if ( !( ulIntStatus & INT_TX_EMPTY ) ) {
        DBG_PRINT( "Tx not working!  Reset the hardware!"NEWLINE );
    }

    /* Acknowledge the interrupt. */
    HardwareAcknowledgeEmpty( pHardware );

    /* Reset all the descriptors. */
    pCurrent = pDescInfo->pRing;
    for ( i = 0; i < pDescInfo->cnAlloc; i++ )
    {
        pCurrent->sw.Control.tx.fHWOwned = FALSE;
        pCurrent->phw->Control.ulData =
            CPU_TO_LE32( pCurrent->sw.Control.ulData );
        pCurrent++;
    }
    pDescInfo->pCurrent = pDescInfo->pRing;
}
#endif

#else
    HardwareWriteRegWord( pHardware, REG_TX_CTRL_BANK, REG_TX_CTRL_OFFSET,
        pHardware->m_wTransmitConfig );

    /* Clear the transmit stopped interrupt status. */
#ifdef SH_32BIT_ACCESS_ONLY
    HardwareWriteIntStat( pHardware, INT_STATUS( INT_TX_STOPPED ));
#else
    HardwareWriteRegWord( pHardware, REG_INT_STATUS_BANK,
        REG_INT_STATUS_OFFSET, INT_TX_STOPPED );
#endif
#endif
}  /* HardwareStartTransmit */


/*
    HardwareStopTransmit

    Description:
        This routine stops the transmit function of the hardware.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareStopTransmit_PCI
#else
void HardwareStopTransmit_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    HW_WRITE_DWORD( pHardware, REG_DMA_TX_CTRL,
                   (pHardware->m_dwTransmitConfig & ~DMA_TX_CTRL_ENABLE ) );

#else
    HardwareWriteRegWord( pHardware, REG_TX_CTRL_BANK, REG_TX_CTRL_OFFSET,
        0 );
#endif
}  /* HardwareStopTransmit */

/* -------------------------------------------------------------------------- */

/*
    Interrupt processing primary routines
*/

#ifndef INLINE
/*
    HardwareAcknowledgeInterrupt

    Description:
        This routine acknowledges the specified interrupts.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

        USHORT wInterrupt
        ULONG  ulInterrupt
            The interrupt masks to be acknowledged.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareAcknowledgeInterrupt_PCI
#else
void HardwareAcknowledgeInterrupt_ISA
#endif
(
    PHARDWARE pHardware,

#ifdef KS_PCI_BUS
    ULONG     ulInterrupt )

#else
    USHORT    wInterrupt )
#endif
{
#ifdef KS_PCI_BUS
    HW_WRITE_DWORD( pHardware, REG_INTERRUPTS_STATUS, ulInterrupt );

#else
#ifdef SH_32BIT_ACCESS_ONLY
    HardwareWriteIntStat( pHardware, INT_STATUS( wInterrupt ));
#else
    HardwareWriteRegWord( pHardware, REG_INT_STATUS_BANK, REG_INT_STATUS_OFFSET,
        wInterrupt );
#endif

#endif
}  /* HardwareAcknowledgeInterrupt */


/*
    HardwareDisableInterrupt

    Description:
        This routine disables the interrupts of the hardware.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareDisableInterrupt_PCI
#else
void HardwareDisableInterrupt_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    HW_WRITE_DWORD( pHardware, REG_INTERRUPTS_ENABLE, 0 );
    pHardware->m_ulInterruptSet = 0;

#else
#ifdef SH_32BIT_ACCESS_ONLY
    HardwareWriteIntMask( pHardware, 0 );
#else
    HardwareWriteRegWord( pHardware, REG_INT_MASK_BANK, REG_INT_MASK_OFFSET,
        0 );
#endif

#endif
}  /* HardwareDisableInterrupt */


/*
    HardwareEnableInterrupt

    Description:
        This routine enables the interrupts of the hardware.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareEnableInterrupt_PCI
#else
void HardwareEnableInterrupt_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    pHardware->m_ulInterruptSet = pHardware->m_ulInterruptMask;
    HW_WRITE_DWORD( pHardware, REG_INTERRUPTS_ENABLE,
        pHardware->m_ulInterruptMask );

#else
#ifdef SH_32BIT_ACCESS_ONLY
    HardwareWriteIntMask( pHardware, pHardware->m_wInterruptMask );
#else
    HardwareWriteRegWord( pHardware, REG_INT_MASK_BANK, REG_INT_MASK_OFFSET,
        pHardware->m_wInterruptMask );
#endif

#endif
}  /* HardwareEnableInterrupt */


/*
    HardwareDisableInterruptBit

    Description:
        This routine disables the individual interrupt bit of the hardware.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

        USHORT wInterrupt
        ULONG  ulInterrupt
            The interrupt masks bit to be disabled.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareDisableInterruptBit_PCI
#else
void HardwareDisableInterruptBit_ISA
#endif
(
    PHARDWARE pHardware,
#ifdef KS_PCI_BUS
    ULONG     ulInterrupt

#else
    USHORT    wInterrupt
#endif
)
{
#ifdef KS_PCI_BUS
    ULONG     ulReadInterrupt;

    HW_READ_DWORD( pHardware, REG_INTERRUPTS_ENABLE,
                   &ulReadInterrupt );
    HW_WRITE_DWORD( pHardware, REG_INTERRUPTS_ENABLE,
                   ( ulReadInterrupt & ~ulInterrupt) );

#else
#ifdef SH_32BIT_ACCESS_ONLY
    ULONG dwReadInterrupt;

    HardwareReadRegDWord( pHardware, REG_INT_MASK_BANK, REG_INT_MASK_OFFSET,
        &dwReadInterrupt );
    dwReadInterrupt &= 0x0000FFFF;
    dwReadInterrupt &= ~wInterrupt;
    HW_WRITE_DWORD( pHardware, REG_INT_MASK_OFFSET, dwReadInterrupt );
#else
    USHORT    wReadInterrupt;

    HardwareReadRegWord( pHardware, REG_INT_MASK_BANK, REG_INT_MASK_OFFSET,
                          &wReadInterrupt );
    HardwareWriteRegWord( pHardware, REG_INT_MASK_BANK, REG_INT_MASK_OFFSET,
                          (USHORT) (wReadInterrupt & ~wInterrupt) );
#endif

#endif
}  /* HardwareDisableInterruptBit */


/*
    HardwareEnableInter