hardware.c

MICREL 网卡驱动 FOR CE 5.0

#endif  /* #ifdef DEF_KS8842 */

}  /* HardwareSwitchSetup */


#ifdef KS_PCI_BUS
void HardwareSetupFunc_PCI
#else
void HardwareSetupFunc_ISA
#endif
(
    struct hw_fn* ks8842_fn )
{
#ifdef KS_PCI_BUS
    ks8842_fn->m_fPCI = TRUE;

#ifdef DEF_KS8842
    ks8842_fn->fnSwitchDisableMirrorSniffer =
        SwitchDisableMirrorSniffer_PCI;
    ks8842_fn->fnSwitchEnableMirrorSniffer =
        SwitchEnableMirrorSniffer_PCI;
    ks8842_fn->fnSwitchDisableMirrorReceive =
        SwitchDisableMirrorReceive_PCI;
    ks8842_fn->fnSwitchEnableMirrorReceive =
        SwitchEnableMirrorReceive_PCI;
    ks8842_fn->fnSwitchDisableMirrorTransmit =
        SwitchDisableMirrorTransmit_PCI;
    ks8842_fn->fnSwitchEnableMirrorTransmit =
        SwitchEnableMirrorTransmit_PCI;
    ks8842_fn->fnSwitchDisableMirrorRxAndTx =
        SwitchDisableMirrorRxAndTx_PCI;
    ks8842_fn->fnSwitchEnableMirrorRxAndTx =
        SwitchEnableMirrorRxAndTx_PCI;

    ks8842_fn->fnHardwareConfig_TOS_Priority =
        HardwareConfig_TOS_Priority_PCI;
    ks8842_fn->fnSwitchDisableDiffServ =
        SwitchDisableDiffServ_PCI;
    ks8842_fn->fnSwitchEnableDiffServ =
        SwitchEnableDiffServ_PCI;

    ks8842_fn->fnHardwareConfig802_1P_Priority =
        HardwareConfig802_1P_Priorit_PCI;
    ks8842_fn->fnSwitchDisable802_1P =
        SwitchDisable802_1P_PCI;
    ks8842_fn->fnSwitchEnable802_1P =
        SwitchEnable802_1P_PCI;
    ks8842_fn->fnSwitchDisableDot1pRemapping =
        SwitchDisableDot1pRemapping_PCI;
    ks8842_fn->fnSwitchEnableDot1pRemapping =
        SwitchEnableDot1pRemapping_PCI;

    ks8842_fn->fnSwitchConfigPortBased =
        SwitchConfigPortBased_PCI;

    ks8842_fn->fnSwitchDisableMultiQueue =
        SwitchDisableMultiQueue_PCI;
    ks8842_fn->fnSwitchEnableMultiQueue =
        SwitchEnableMultiQueue_PCI;

    ks8842_fn->fnSwitchDisableBroadcastStorm =
        SwitchDisableBroadcastStorm_PCI;
    ks8842_fn->fnSwitchEnableBroadcastStorm =
        SwitchEnableBroadcastStorm_PCI;
    ks8842_fn->fnHardwareConfigBroadcastStorm =
        HardwareConfigBroadcastStorm_PCI;

    ks8842_fn->fnSwitchDisablePriorityRate =
        SwitchDisablePriorityRate_PCI;
    ks8842_fn->fnSwitchEnablePriorityRate =
        SwitchEnablePriorityRate_PCI;

    ks8842_fn->fnHardwareConfigRxPriorityRate =
        HardwareConfigRxPriorityRate_PCI;
    ks8842_fn->fnHardwareConfigTxPriorityRate =
        HardwareConfigTxPriorityRate_PCI;

    ks8842_fn->fnPortSet_STP_State =
        PortSet_STP_State_PCI;

    ks8842_fn->fnSwitchEnableVlan =
        SwitchEnableVlan_PCI;
#endif

    ks8842_fn->fnPortReadMIBCounter =
        PortReadMIBCounter_PCI;
    ks8842_fn->fnPortReadMIBPacket =
        PortReadMIBPacket_PCI;

#else
    ks8842_fn->m_fPCI = FALSE;

#ifdef DEF_KS8842
    ks8842_fn->fnSwitchDisableMirrorSniffer =
        SwitchDisableMirrorSniffer_ISA;
    ks8842_fn->fnSwitchEnableMirrorSniffer =
        SwitchEnableMirrorSniffer_ISA;
    ks8842_fn->fnSwitchDisableMirrorReceive =
        SwitchDisableMirrorReceive_ISA;
    ks8842_fn->fnSwitchEnableMirrorReceive =
        SwitchEnableMirrorReceive_ISA;
    ks8842_fn->fnSwitchDisableMirrorTransmit =
        SwitchDisableMirrorTransmit_ISA;
    ks8842_fn->fnSwitchEnableMirrorTransmit =
        SwitchEnableMirrorTransmit_ISA;
    ks8842_fn->fnSwitchDisableMirrorRxAndTx =
        SwitchDisableMirrorRxAndTx_ISA;
    ks8842_fn->fnSwitchEnableMirrorRxAndTx =
        SwitchEnableMirrorRxAndTx_ISA;

    ks8842_fn->fnHardwareConfig_TOS_Priority =
        HardwareConfig_TOS_Priority_ISA;
    ks8842_fn->fnSwitchDisableDiffServ =
        SwitchDisableDiffServ_ISA;
    ks8842_fn->fnSwitchEnableDiffServ =
        SwitchEnableDiffServ_ISA;

    ks8842_fn->fnHardwareConfig802_1P_Priority =
        HardwareConfig802_1P_Priorit_ISA;
    ks8842_fn->fnSwitchDisable802_1P =
        SwitchDisable802_1P_ISA;
    ks8842_fn->fnSwitchEnable802_1P =
        SwitchEnable802_1P_ISA;
    ks8842_fn->fnSwitchDisableDot1pRemapping =
        SwitchDisableDot1pRemapping_ISA;
    ks8842_fn->fnSwitchEnableDot1pRemapping =
        SwitchEnableDot1pRemapping_ISA;

    ks8842_fn->fnSwitchConfigPortBased =
        SwitchConfigPortBased_ISA;

    ks8842_fn->fnSwitchDisableMultiQueue =
        SwitchDisableMultiQueue_ISA;
    ks8842_fn->fnSwitchEnableMultiQueue =
        SwitchEnableMultiQueue_ISA;

    ks8842_fn->fnSwitchDisableBroadcastStorm =
        SwitchDisableBroadcastStorm_ISA;
    ks8842_fn->fnSwitchEnableBroadcastStorm =
        SwitchEnableBroadcastStorm_ISA;
    ks8842_fn->fnHardwareConfigBroadcastStorm =
        HardwareConfigBroadcastStorm_ISA;

    ks8842_fn->fnSwitchDisablePriorityRate =
        SwitchDisablePriorityRate_ISA;
    ks8842_fn->fnSwitchEnablePriorityRate =
        SwitchEnablePriorityRate_ISA;

    ks8842_fn->fnHardwareConfigRxPriorityRate =
        HardwareConfigRxPriorityRate_ISA;
    ks8842_fn->fnHardwareConfigTxPriorityRate =
        HardwareConfigTxPriorityRate_ISA;

    ks8842_fn->fnPortSet_STP_State =
        PortSet_STP_State_ISA;

    ks8842_fn->fnSwitchEnableVlan =
        SwitchEnableVlan_ISA;
#endif

    ks8842_fn->fnPortReadMIBCounter =
        PortReadMIBCounter_ISA;
    ks8842_fn->fnPortReadMIBPacket =
        PortReadMIBPacket_ISA;
#endif
}  /* HardwareSetupFunc */


/*
    HardwareSetupInterrupt

    Description:
        This routine setup the interrupt mask for proper operation.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareSetupInterrupt_PCI
#else
void HardwareSetupInterrupt_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    pHardware->m_ulInterruptMask = INT_MASK;
    pHardware->m_ulInterruptMask |= INT_PHY;
    pHardware->m_ulInterruptMask |= INT_RX_OVERRUN;

#else
    pHardware->m_wInterruptMask = INT_MASK;
    pHardware->m_wInterruptMask |= INT_PHY;

#ifdef DBG
    pHardware->m_wInterruptMask |= INT_RX_ERROR;
#endif

#if defined (EARLY_RECEIVE) && defined(DEF_KS8841)
    pHardware->m_wInterruptMask |= ( INT_RX_EARLY );
#endif

#if defined (EARLY_TRANSMIT) && defined(DEF_KS8841)
    pHardware->m_wInterruptMask |= INT_TX_UNDERRUN;
#endif

#if defined( DEF_LINUX ) && defined( DBG )
    pHardware->m_wInterruptMask |= INT_RX_OVERRUN;
#endif

    /* Acknowledge PHY interrupt after PHY reset. */
    HardwareAcknowledgeInterrupt( pHardware, INT_PHY );
#endif
}  /* HardwareSetupInterrupt */


/*
    HardwareClearCounters

    Description:
        This routine resets all hardware counters to zero.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#if defined( KS_ISA_BUS )  ||  !defined( KS_ISA )

void HardwareClearCounters (
    PHARDWARE pHardware )
{
    memset(( void* ) pHardware->m_cnCounter, 0,
        SWITCH_PORT_NUM * ( sizeof( ULONGLONG ) * OID_COUNTER_LAST ) );

    PortInitCounters( pHardware, pHardware->m_bPortSelect );
}  /* HardwareClearCounters */



#endif

/* -------------------------------------------------------------------------- */

#ifdef KS_PCI_BUS
#ifdef DBG
void CheckDescriptors (
    PTDescInfo pInfo )
{
    int    i;
    PTDesc pDesc = pInfo->pRing;

    DBG_PRINT( "  %p: %d, %d, %d"NEWLINE, pInfo->phwRing, pInfo->cnAvail,
        pInfo->iLast, pInfo->iNext );
    for ( i = 0; i < pInfo->cnAlloc; i++ )
    {
        DBG_PRINT( "%08lx %08lx %08lx %08lx; %08lx %08lx"NEWLINE,
            pDesc->phw->Control.ulData,
            pDesc->phw->BufSize.ulData,
            pDesc->phw->ulBufAddr,
            pDesc->phw->ulNextPtr,
            pDesc->sw.Control.ulData,
            pDesc->sw.BufSize.ulData );
        pDesc++;
    }
}  /* CheckDescriptors */
#endif


void CheckDescriptorNum (
    PTDescInfo pInfo )
{
    int cnAlloc = pInfo->cnAlloc;
    int nShift;

    nShift = 0;
    while ( !( cnAlloc & 1 ) )
    {
        nShift++;
        cnAlloc >>= 1;
    }
    if ( cnAlloc != 1  ||  nShift < 2 )
    {
        DBG_PRINT( "Hardware descriptor numbers not right!"NEWLINE );
        while ( cnAlloc )
        {
            nShift++;
            cnAlloc >>= 1;
        }
        if ( nShift < 2 )
        {
            nShift = 2;
        }
        cnAlloc = 1 << nShift;
        pInfo->cnAlloc = cnAlloc;
    }
    pInfo->iMax = pInfo->cnAlloc - 1;
}  /* CheckDescriptorNum */


void HardwareInitDescriptors (
    PTDescInfo pDescInfo,
    int        fTransmit )
{
    int       i;
    ULONG     ulPhysical = pDescInfo->ulRing;
    PTHw_Desc pDesc = pDescInfo->phwRing;
    PTDesc    pCurrent = pDescInfo->pRing;
    PTDesc    pPrevious = NULL;

#ifdef CHECK_OVERRUN
    int       check = ( pDescInfo->cnAlloc * 15 ) / 16;
#endif

    for ( i = 0; i < pDescInfo->cnAlloc; i++ )
    {
        pCurrent->phw = pDesc++;
        ulPhysical += pDescInfo->nSize;
        if ( fTransmit )
        {
#if TXCHECKSUM_DEFAULT
            /* Hardware cannot handle UDP packet in IP fragments. */
            pCurrent->sw.BufSize.ulData =
                ( DESC_TX_CSUM_GEN_TCP | DESC_TX_CSUM_GEN_IP );
#endif
        }
        pPrevious = pCurrent++;
        pPrevious->phw->ulNextPtr = CPU_TO_LE32( ulPhysical );

#ifdef CHECK_OVERRUN
        pPrevious->pCheck = &pDescInfo->phwRing[(( i + check ) &
            pDescInfo->iMax )];
#endif
    }
    pPrevious->phw->ulNextPtr = CPU_TO_LE32( pDescInfo->ulRing );
    pPrevious->sw.BufSize.rx.fEndOfRing = TRUE;
    pPrevious->phw->BufSize.ulData =
        CPU_TO_LE32( pPrevious->sw.BufSize.ulData );

    pDescInfo->cnAvail = pDescInfo->cnAlloc;
    pDescInfo->iLast = pDescInfo->iNext = 0;

    pDescInfo->pCurrent = pDescInfo->pRing;
}  /* HardwareInitDescriptors */


/*
 * HardwareSetDescriptorBase
 *	This function sets MAC address to given type (WAN, LAN or HPHA)
 *
 * Argument(s)
 *  pHardware        Pointer to hardware instance.
 *  pTxDescBaseAddr	 pointer to base address of Tx descripotr.
 *  pRxDescBaseAddr	 pointer to base address of Rx descripotr.
 *
 * Return(s)
 *	NONE.
 */
void HardwareSetDescriptorBase
(
    PHARDWARE  pHardware,
    ULONG      TxDescBaseAddr,
    ULONG      RxDescBaseAddr
)
{
    /* Set base address of Tx/Rx descriptors */
    HW_WRITE_DWORD( pHardware, REG_DMA_TX_ADDR, TxDescBaseAddr );
    HW_WRITE_DWORD( pHardware, REG_DMA_RX_ADDR, RxDescBaseAddr );
}  /* HardwareSetDescriptorBase */


void HardwareResetPackets (
    PTDescInfo pInfo )
{
    pInfo->pCurrent = pInfo->pRing;
    pInfo->cnAvail = pInfo->cnAlloc;
    pInfo->iLast = pInfo->iNext = 0;
}  /* HardwareResetPackets */
#endif


/* -------------------------------------------------------------------------- */

/*
    Link processing primary routines
*/

#ifndef INLINE
/*
    HardwareAcknowledgeLink

    Description:
        This routine acknowledges the link change interrupt.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareAcknowledgeLink_PCI
#else
void HardwareAcknowledgeLink_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_PCI_BUS
    HW_WRITE_DWORD( pHardware, REG_INTERRUPTS_STATUS, INT_PHY );

#else
#ifdef SH_32BIT_ACCESS_ONLY
    HardwareWriteIntStat( pHardware, INT_STATUS( INT_PHY ));
#else
    HardwareWriteRegWord( pHardware, REG_INT_STATUS_BANK, REG_INT_STATUS_OFFSET,
        INT_PHY );
#endif
#endif
}  /* HardwareAcknowledgeLink */
#endif


/*
    HardwareCheckLink

    Description:
        This routine checks the link status.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareCheckLink_PCI
#else
void HardwareCheckLink_ISA
#endif
(
    PHARDWARE pHardware )
{
    SwitchGetLinkStatus( pHardware );

}  /* HardwareCheckLink */

/* -------------------------------------------------------------------------- */

/*
    Receive processing primary routines
*/

#ifndef INLINE

/*
    HardwareReleaseReceive

    Description:
        This routine release the receive packet memory.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

#ifdef KS_PCI_BUS
void HardwareReleaseReceive_PCI
#else
void HardwareReleaseReceive_ISA
#endif
(
    PHARDWARE pHardware )
{
#ifdef KS_ISA_BUS
#ifdef SH_16BIT_WRITE
    HardwareWriteRegWord( pHardware, REG_RXQ_CMD_BANK, REG_RXQ_CMD_OFFSET,
        RXQ_CMD_FREE_PACKET );

#else
    HardwareWriteRegByte( pHardware, REG_RXQ_CMD_BANK, REG_RXQ_CMD_OFFSET,
        RXQ_CMD_FREE_PACKET );
#endif
#endif /* KS_ISA_BUS */

}  /* HardwareReleaseReceive */



/*
    HardwareAcknowledgeReceive

    Description:
        This routine acknowledges the receive interrupt.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):