hardware.c

MICREL 网卡驱动 FOR CE 5.0

#endif


#define PHY_RESET_TIMEOUT  10


/*
    HardwareReadPhy

    Description:
        This routine reads data from the PHY register.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

        int port
            Port to read.

        USHORT wPhyReg
            PHY register to read.

        PUSHORT pwData
            Pointer to word to store the read data.

    Return (None):
*/

void HardwareReadPhy (
    PHARDWARE pHardware,
    int       port,
    USHORT    wPhyReg,
    PUSHORT   pwData )
{
#ifdef KS_PCI_BUS
    int phy;

    phy = REG_PHY_1_CTRL_OFFSET + port * PHY_CTRL_INTERVAL + wPhyReg;
    HW_READ_WORD( pHardware, phy, pwData );

#else
    HardwareSelectBank( pHardware, ( UCHAR )( REG_PHY_1_CTRL_BANK + port *
        PHY_BANK_INTERVAL ));
    HW_READ_WORD( pHardware, wPhyReg, pwData );
#endif
}  /* HardwareReadPhy */


/*
    HardwareWritePhy

    Description:
        This routine writes data to the PHY register.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

        int port
            Port to write.

        USHORT wPhyReg
            PHY register to write.

        USHORT wData
            Word data to write.

    Return (None):
*/

void HardwareWritePhy (
    PHARDWARE pHardware,
    int       port,
    USHORT    wPhyReg,
    USHORT    wRegData )
{
#ifdef KS_PCI_BUS
    int phy;

    phy = REG_PHY_1_CTRL_OFFSET + port * PHY_CTRL_INTERVAL + wPhyReg;
    HW_WRITE_WORD( pHardware, phy, wRegData );

#else
    HardwareSelectBank( pHardware, ( UCHAR )( REG_PHY_1_CTRL_BANK + port *
        PHY_BANK_INTERVAL ));
    HW_WRITE_WORD( pHardware, wPhyReg, wRegData );
#endif
}  /* HardwareWritePhy */


#if 0
/*
    HardwareSetupPhy

    Description:
        This routine setup the PHY registers for proper operation and
        determines the initial link status after auto negotiation.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (None):
*/

static
void HardwareSetupPhy (
    PHARDWARE pHardware )
{
    USHORT RegData;
    USHORT wStatus;


    {
        UCHAR bStatus;
        UCHAR bPhy = 0;
        int   phy;

#ifdef KS_PCI_BUS
        phy = REG_PHY_1_CTRL_OFFSET + bPhy * PHY_CTRL_INTERVAL;

#else
        phy = bPhy;
        HardwareSelectBank( pHardware, ( UCHAR )( REG_PHY_1_CTRL_BANK + phy *
            PHY_BANK_INTERVAL ));
#endif /* #ifdef KS_PCI_BUS */

        HW_READ_PHY_LINK_STATUS( pHardware, phy, RegData );
        PortConfigReadByte( pHardware, bPhy,
#ifdef KS_ISA_BUS
                            REG_PORT_LINK_STATUS_BANK,
#endif
                            REG_PORT_STATUS_HI_OFFSET, &bStatus );
        wStatus = bStatus << 8;
    }

    /* Default 10 MBit. */
    pHardware->m_ulTransmitRate = 100000;
    pHardware->m_ulDuplex = 1;
    if ( ( RegData & PHY_LINK_STATUS ) )
    {
        pHardware->m_ulHardwareState = MediaStateConnected;
        if ( ( wStatus & PHY_STAT_SPEED_100MBIT ) )
        {
            pHardware->m_ulTransmitRate = 1000000;
        }
        if ( ( wStatus & PHY_STAT_FULL_DUPLEX ) )
        {
            pHardware->m_ulDuplex = 2;
        }
    }
    else
        pHardware->m_ulHardwareState = MediaStateDisconnected;

#ifdef DBG
    DBG_PRINT( "link status: %04X; %d, %d, %d"NEWLINE, wStatus,
        ( int ) pHardware->m_ulHardwareState,
        ( int ) pHardware->m_ulTransmitRate,
        ( int ) pHardware->m_ulDuplex);
#endif
}  /* HardwareSetupPhy */
#endif

/* -------------------------------------------------------------------------- */

#if defined( KS_ISA_BUS )  &&  defined( DBG )
void DisplayRegisters (
    PHARDWARE pHardware )
{
    UCHAR b;
    UCHAR i;

#ifdef UNDER_CE
    pHardware->reg[ 1 ][ 15 ] = 1;
    for ( b = 4; b < 16; b++ )
        pHardware->reg[ b ][ 15 ] = 1;
    for ( b = 20; b < 32; b++ )
        pHardware->reg[ b ][ 15 ] = 1;
    for ( b = 0; b < 54; b++ )
    {
        if ( pHardware->reg[ b ][ 15 ] )
            continue;
        HardwareSelectBank( pHardware, b );
        for ( i = 0; i < 0x0E; i += 1 )
        {
            HW_READ_BYTE( pHardware, i, &pHardware->reg[ b ][ i ]);
        }
    }
    for ( b = 0; b < 54; b++ )
    {
        if ( pHardware->reg[ b ][ 15 ] )
            continue;
DBG_PRINT( "%2d: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x"NEWLINE,
        b,
        pHardware->reg[ b ][ 0 ], pHardware->reg[ b ][ 1 ],
        pHardware->reg[ b ][ 2 ], pHardware->reg[ b ][ 3 ],
        pHardware->reg[ b ][ 4 ], pHardware->reg[ b ][ 5 ],
        pHardware->reg[ b ][ 6 ], pHardware->reg[ b ][ 7 ],
        pHardware->reg[ b ][ 8 ], pHardware->reg[ b ][ 9 ],
        pHardware->reg[ b ][ 10 ], pHardware->reg[ b ][ 11 ],
        pHardware->reg[ b ][ 12 ], pHardware->reg[ b ][ 13 ]);
    }

#else
    USHORT RegData;
    UCHAR  bBank[ 54 ];

    memset( bBank, 0, 54 );
    bBank[ 1 ] = 1;
    for ( b = 4; b < 16; b++ )
        bBank[ b ] = 1;
    for ( b = 20; b < 32; b++ )
        bBank[ b ] = 1;
    for ( b = 0; b < 54; b++ )
    {
        if ( bBank[ b ] )
            continue;
        DBG_PRINT( "bank %2d: ", b );
        for ( i = 0; i < 0x0E; i += 2 )
        {
            HardwareReadRegWord( pHardware, b, i, &RegData );
            DBG_PRINT( "%04X ", RegData );
        }
        DBG_PRINT( NEWLINE );
    }
#endif
}  /* DisplayRegisters */
#endif

/* -------------------------------------------------------------------------- */

#define AT93C_CODE    0
#define AT93C_WR_OFF  0x00
#define AT93C_WR_ALL  0x10
#define AT93C_ER_ALL  0x20
#define AT93C_WR_ON   0x30

#define AT93C_WRITE   1
#define AT93C_READ    2
#define AT93C_ERASE   3

#define EEPROM_DELAY  4


static
#ifdef DEF_LINUX
inline
#endif
#ifdef _WIN32
__inline
#endif
void DropGPIO (
    PHARDWARE pHardware,
    UCHAR     gpio )
{
    USHORT data;

    HW_READ_WORD( pHardware, REG_EEPROM_CTRL_OFFSET, &data );
    data &= ~gpio;
    HW_WRITE_WORD( pHardware, REG_EEPROM_CTRL_OFFSET, data );
}  /* DropGPIO */


static
#ifdef DEF_LINUX
inline
#endif
#ifdef _WIN32
__inline
#endif
void RaiseGPIO (
    PHARDWARE pHardware,
    UCHAR     gpio )
{
    USHORT data;

    HW_READ_WORD( pHardware, REG_EEPROM_CTRL_OFFSET, &data );
    data |= gpio;
    HW_WRITE_WORD( pHardware, REG_EEPROM_CTRL_OFFSET, data );
}  /* RaiseGPIO */


static
#ifdef DEF_LINUX
inline
#endif
#ifdef _WIN32
__inline
#endif
UCHAR StateGPIO (
    PHARDWARE pHardware,
    UCHAR     gpio )
{
    USHORT data;

    HW_READ_WORD( pHardware, REG_EEPROM_CTRL_OFFSET, &data );
    return(( UCHAR )( data & gpio ));
}  /* StateGPIO */


#define EEPROM_CLOCK( pHardware )                                           \
{                                                                           \
    RaiseGPIO( pHardware, EEPROM_SERIAL_CLOCK );                            \
    DelayMicrosec( EEPROM_DELAY );                                          \
    DropGPIO( pHardware, EEPROM_SERIAL_CLOCK );                             \
    DelayMicrosec( EEPROM_DELAY );                                          \
}


static
USHORT SPIMRead (
    PHARDWARE pHardware )
{
    int    i;
    USHORT bTemp = 0;

    for ( i = 15; i >= 0; i-- ) {
        RaiseGPIO( pHardware, EEPROM_SERIAL_CLOCK );
        DelayMicrosec( EEPROM_DELAY );

        bTemp |= ( StateGPIO( pHardware, EEPROM_DATA_IN )) ? 1 << i : 0;

        DropGPIO( pHardware, EEPROM_SERIAL_CLOCK );
        DelayMicrosec( EEPROM_DELAY );
    }
    return bTemp;
}  /* SPIMRead */


static
void SPIMWrite (
    PHARDWARE pHardware,
    USHORT    Data )
{
    int i;

    for ( i = 15; i >= 0; i-- ) {
        ( Data & ( 0x01 << i ) ) ? RaiseGPIO( pHardware, EEPROM_DATA_OUT ) :
            DropGPIO( pHardware, EEPROM_DATA_OUT );
        EEPROM_CLOCK( pHardware );
    }
}  /* SPIMWrite */


static
void SPIMReg (
    PHARDWARE pHardware,
    UCHAR     Data,
    UCHAR     Reg )
{
    int i;

    /* Initial start bit */
    RaiseGPIO( pHardware, EEPROM_DATA_OUT );
    EEPROM_CLOCK( pHardware );

    /* AT93C operation */
    for ( i = 1; i >= 0; i-- ) {
        ( Data & ( 0x01 << i ) ) ? RaiseGPIO( pHardware, EEPROM_DATA_OUT ) :
            DropGPIO( pHardware, EEPROM_DATA_OUT );
        EEPROM_CLOCK( pHardware );
    }

    /* Address location */
    for ( i = 5; i >= 0; i-- ) {
        ( Reg & ( 0x01 << i ) ) ? RaiseGPIO( pHardware, EEPROM_DATA_OUT ) :
            DropGPIO( pHardware, EEPROM_DATA_OUT );
        EEPROM_CLOCK( pHardware );
    }
}  /* SPIMReg */


/*
    EepromReadWord

    Description:
        This function reads a word from the AT93C46 EEPROM.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

        UCHAR Reg
            The register offset.

    Return (USHORT):
        The data value.
*/

USHORT EepromReadWord (
    PHARDWARE pHardware,
    UCHAR     Reg )
{
    USHORT Data;

#ifdef KS_ISA_BUS
    HardwareSelectBank( pHardware, REG_EEPROM_CTRL_BANK );
#endif
    RaiseGPIO( pHardware, EEPROM_ACCESS_ENABLE | EEPROM_CHIP_SELECT );

    SPIMReg( pHardware, AT93C_READ, Reg );
    Data = SPIMRead( pHardware );

    DropGPIO( pHardware, EEPROM_ACCESS_ENABLE | EEPROM_CHIP_SELECT );

    return( Data );
}  /* EepromReadWord */


/*
    EepromWriteWord

    Description:
        This procedure writes a word to the AT93C46 EEPROM.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

        UCHAR Reg
            The register offset.

        USHORT Data
            The data value.

    Return (None):
*/

void EepromWriteWord (
    PHARDWARE pHardware,
    UCHAR     Reg,
    USHORT    Data )
{
    int timeout;

#ifdef KS_ISA_BUS
    HardwareSelectBank( pHardware, REG_EEPROM_CTRL_BANK );
#endif
    RaiseGPIO( pHardware, EEPROM_ACCESS_ENABLE | EEPROM_CHIP_SELECT );

    /* Enable write. */
    SPIMReg( pHardware, AT93C_CODE, AT93C_WR_ON );
    DropGPIO( pHardware, EEPROM_CHIP_SELECT );
    DelayMicrosec( 1 );

    /* Erase the register. */
    RaiseGPIO( pHardware, EEPROM_CHIP_SELECT );
    SPIMReg( pHardware, AT93C_ERASE, Reg );
    DropGPIO( pHardware, EEPROM_CHIP_SELECT );
    DelayMicrosec( 1 );

    /* Check operation complete. */
    RaiseGPIO( pHardware, EEPROM_CHIP_SELECT );
    timeout = 8;
    DelayMillisec( 2 );
    do {
        DelayMillisec( 1 );
    } while ( !StateGPIO( pHardware, EEPROM_DATA_IN )  &&  --timeout );
    DropGPIO( pHardware, EEPROM_CHIP_SELECT );
    DelayMicrosec( 1 );

    /* Write the register. */
    RaiseGPIO( pHardware, EEPROM_CHIP_SELECT );
    SPIMReg( pHardware, AT93C_WRITE, Reg );
    SPIMWrite( pHardware, Data );
    DropGPIO( pHardware, EEPROM_CHIP_SELECT );
    DelayMicrosec( 1 );

    /* Check operation complete. */
    RaiseGPIO( pHardware, EEPROM_CHIP_SELECT );
    timeout = 8;
    DelayMillisec( 2 );
    do {
        DelayMillisec( 1 );
    } while ( !StateGPIO( pHardware, EEPROM_DATA_IN )  &&  --timeout );
    DropGPIO( pHardware, EEPROM_CHIP_SELECT );
    DelayMicrosec( 1 );

    /* Disable write. */
    RaiseGPIO( pHardware, EEPROM_CHIP_SELECT );
    SPIMReg( pHardware, AT93C_CODE, AT93C_WR_OFF );

    DropGPIO( pHardware, EEPROM_ACCESS_ENABLE | EEPROM_CHIP_SELECT );
}  /* EepromWriteWord */

/* -------------------------------------------------------------------------- */

/*
    HardwareInitialize

    Description:
        This function checks the hardware is correct for this driver and resets
        the hardware for proper initialization.

    Parameters:
        PHARDWARE pHardware
            Pointer to hardware instance.

    Return (BOOLEAN):
        TRUE if successful; otherwise, FALSE.
*/

#ifdef KS_PCI_BUS
BOOLEAN HardwareInitialize_PCI
#else
BOOLEAN HardwareInitialize_ISA
#endif
(
    PHARDWARE pHardware )
{
    USHORT RegData;