head.s

英培特ARM教学平台EDUKIT-III

/*
 * Name	: head.s
 * Disc	: startup code
 * 2007-08-03 by Qingmin Liu
 */

@
@ constants
@

@ WDT Register
.equ WDTCON,		0x53000000
@ Memory Control Register Base Address
.equ MEM_CTL_BASE,	0x48000000
@ Sdram Base Address
.equ SDRAM_BASE,	0x30000000
@ Stack top address
.equ stack_top,		0x34000000

@
@ start
@

.text
.global _start

_start:
	@ disable watch dog timer
	mov r0, #WDTCON
	mov r1, #0x0
	str r1, [r0]

	@ memory setup
	bl memsetup

	@ copy the 4K code from steppingstone
	bl copy_steppingston_to_sdram

	@ jump to sdram space
	ldr pc, =setup_stack

setup_stack:
	ldr sp, =stack_top

	bl main

stop:
	b stop

@
@ sub routines
@

@ r1: src base address
@ r2: dst base address
@ r3: data block length

copy_steppingston_to_sdram:
	mov r1, #0x00000000
	ldr r2, =SDRAM_BASE
	mov r3, #4096
1:
	@ auto-indexing
	@ first transfer, and then write back to the base register r1
	ldr r4, [r1], #4
	str r4, [r2], #4
	@ r1 is equal to counter
	cmp r1, r3
	bne 1b

	mov pc, lr

@ r1: memory control register base address
@ r2: memory control register table address
@ r3: r1+13 words(because there is 13 registers)

memsetup:
	mov     r1, #MEM_CTL_BASE
	adrl    r2, mem_cfg_val
	add     r3, r1, #13*4
1:
	@ write initial values to registers
	ldr     r4, [r2], #4
	str     r4, [r1], #4
	cmp     r1, r3
	bne     1b

        mov     pc, lr

.align 4
mem_cfg_val:
	.long 0x22111110	@ BWSCON
	.long 0x00000700	@ BANKCON0
	.long 0x00000700	@ BANKCON1
	.long 0x00000700	@ BANKCON2
	.long 0x00000700	@ BANKCON3
	.long 0x00000700	@ BANKCON4
	.long 0x00000700	@ BANKCON5
	.long 0x00018005	@ BANKCON6
	.long 0x00018005	@ BANKCON7
	.long 0x008e07a3	@ REFRESH
	.long 0x000000b2	@ BANKSIZE
	.long 0x00000030	@ MRSRB6
	.long 0x00000030	@ MRSRB7

.end