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📄 mode_i.asm

📁 Welcome to the software files for the ADS8361 to TMS320F2812! There are two project files in each
💻 ASM
📖 第 1 页 / 共 5 页
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12345 
        MOV       @_SpiaRegs+11,AL      ; |162| 
	.line	6
        MOV       @_SpiaRegs+12,#0      ; |163| 
	.line	7
        LRETR
        ; return occurs
	.endfunc	164,000000000h,0



	.sect	".text"
	.global	_spi_fifo_enable
	.sym	_spi_fifo_enable,_spi_fifo_enable, 32, 2, 0
	.func	166

;***************************************************************
;* FNAME: _spi_fifo_enable              FR SIZE:   0           *
;*                                                             *
;* FUNCTION ENVIRONMENT                                        *
;*                                                             *
;* FUNCTION PROPERTIES                                         *
;*                            0 Parameter,  0 Auto,  0 SOE     *
;***************************************************************

_spi_fifo_enable:
	.line	2
	.line	4
        MOVW      DP,#_SpiaRegs+10
        OR        @_SpiaRegs+10,#0xc040 ; |169| 
	.line	5
        OR        @_SpiaRegs+11,#0x6062 ; |170| 
	.line	7
        LRETR
        ; return occurs
	.endfunc	172,000000000h,0



	.sect	".text"
	.global	_mcbsp_init
	.sym	_mcbsp_init,_mcbsp_init, 32, 2, 0
	.func	174

;***************************************************************
;* FNAME: _mcbsp_init                   FR SIZE:   0           *
;*                                                             *
;* FUNCTION ENVIRONMENT                                        *
;*                                                             *
;* FUNCTION PROPERTIES                                         *
;*                            0 Parameter,  0 Auto,  0 SOE     *
;***************************************************************

_mcbsp_init:
	.line	2
	.line	3
        MOVW      DP,#_McbspaRegs+4
        MOV       @_McbspaRegs+4,#0     ; |176| 
	.line	4
        MOV       @_McbspaRegs+5,#512   ; |177| 
	.line	5
        MOV       @_McbspaRegs+6,#0     ; |178| 
	.line	6
        MOV       @_McbspaRegs+7,#0     ; |179| 
	.line	7
        MOV       @_McbspaRegs+8,#0     ; |180| 
	.line	8
        MOV       @_McbspaRegs+9,#0     ; |181| 
	.line	9
        MOV       @_McbspaRegs+10,#8207 ; |182| 
	.line	10
        MOV       @_McbspaRegs+11,#1    ; |183| 
	.line	11
        MOV       @_McbspaRegs+12,#0    ; |184| 
	.line	12
        MOV       @_McbspaRegs+13,#0    ; |185| 
	.line	13
        MOV       @_McbspaRegs+18,#2560 ; |186| 
	.line	16
        AND       @_McbspaRegs+5,#0x9fff ; |189| 
	.line	17
        AND       AL,@_McbspaRegs+5,#0xe7ff ; |190| 
        OR        AL,#0x1000            ; |190| 
        MOV       @_McbspaRegs+5,AL     ; |190| 
	.line	18
        AND       @_McbspaRegs+10,#0xefff ; |191| 
	.line	20
        AND       AL,@_McbspaRegs+10,#0xf000 ; |193| 
        ORB       AL,#0x20              ; |193| 
        MOV       @_McbspaRegs+10,AL    ; |193| 
	.line	21
        AND       AL,@_McbspaRegs+11,#0xff00 ; |194| 
        ORB       AL,#0x03              ; |194| 
        MOV       @_McbspaRegs+11,AL    ; |194| 
	.line	22
        MOV       AL,@_McbspaRegs+11    ; |195| 
        ANDB      AL,#0xff              ; |195| 
        OR        AL,#0x0300            ; |195| 
        MOV       @_McbspaRegs+11,AL    ; |195| 
	.line	23
        AND       @_McbspaRegs+6,#0xffe7 ; |196| 
	.line	24
        AND       @_McbspaRegs+6,#0xfffc ; |197| 
	.line	25
        AND       @_McbspaRegs+8,#0xffe7 ; |198| 
	.line	26
        AND       @_McbspaRegs+8,#0xfffc ; |199| 
	.line	27
        AND       AL,@_McbspaRegs+7,#0xff1f ; |200| 
        ORB       AL,#0x60              ; |200| 
        MOV       @_McbspaRegs+7,AL     ; |200| 
	.line	28
        AND       AL,@_McbspaRegs+9,#0xff1f ; |201| 
        ORB       AL,#0xa0              ; |201| 
        MOV       @_McbspaRegs+9,AL     ; |201| 
	.line	31
        OR        @_McbspaRegs+4,#0x0001 ; |204| 
	.line	32
        OR        @_McbspaRegs+5,#0x0001 ; |205| 
	.line	34
        OR        @_McbspaRegs+4,#0x0040 ; |207| 
	.line	36
        LRETR
        ; return occurs
	.endfunc	209,000000000h,0



	.sect	".text"
	.global	_mcbsp_xmit
	.sym	_mcbsp_xmit,_mcbsp_xmit, 32, 2, 0
	.func	211

;***************************************************************
;* FNAME: _mcbsp_xmit                   FR SIZE:   2           *
;*                                                             *
;* FUNCTION ENVIRONMENT                                        *
;*                                                             *
;* FUNCTION PROPERTIES                                         *
;*                            0 Parameter,  2 Auto,  0 SOE     *
;***************************************************************

_mcbsp_xmit:
	.line	2
;* AL    assigned to _a
	.sym	_a,0, 4, 17, 16
;* AH    assigned to _b
	.sym	_b,1, 4, 17, 16
	.sym	_a,-1, 4, 1, 16
	.sym	_b,-2, 4, 1, 16
        ADDB      SP,#2
        MOV       *-SP[2],AH            ; |212| 
        MOV       *-SP[1],AL            ; |212| 
L12:    
        MOVW      DP,#_McbspaRegs+4
        AND       AL,@_McbspaRegs+4,#0x0002 ; |212| 
        LSR       AL,1                  ; |212| 
        BF        L12,EQ                ; |212| 
        ; branch occurs ; |212| 
	.line	3
        MOV       AL,*-SP[1]            ; |213| 
        MOV       @_McbspaRegs+2,AL     ; |213| 
	.line	4
        MOV       AL,*-SP[2]            ; |214| 
        MOV       @_McbspaRegs+3,AL     ; |214| 
	.line	5
        SUBB      SP,#2
        LRETR
        ; return occurs
	.endfunc	215,000000000h,2



	.sect	".text"
	.global	_Toggle_CS
	.sym	_Toggle_CS,_Toggle_CS, 32, 2, 0
	.func	217

;***************************************************************
;* FNAME: _Toggle_CS                    FR SIZE:   1           *
;*                                                             *
;* FUNCTION ENVIRONMENT                                        *
;*                                                             *
;* FUNCTION PROPERTIES                                         *
;*                            0 Parameter,  1 Auto,  0 SOE     *
;***************************************************************

_Toggle_CS:
	.line	2
;* AL    assigned to _state
	.sym	_state,0, 4, 17, 16
	.sym	_state,-1, 4, 1, 16
        ADDB      SP,#1
        MOV       *-SP[1],AL            ; |218| 
	.line	3
        B         L15,UNC               ; |219| 
        ; branch occurs ; |219| 
L13:    
	.line	6
        MOVW      DP,#_GpioDataRegs+2
        MOV       @_GpioDataRegs+2,#8   ; |222| 
        B         L16,UNC               ; |222| 
        ; branch occurs ; |222| 
L14:    
	.line	9
        MOVW      DP,#_GpioDataRegs+1
        MOV       @_GpioDataRegs+1,#8   ; |225| 
        B         L16,UNC               ; |225| 
        ; branch occurs ; |225| 
L15:    
	.line	3
        CMPB      AL,#0                 ; |219| 
        BF        L13,EQ                ; |219| 
        ; branch occurs ; |219| 
        CMPB      AL,#1                 ; |219| 
        BF        L14,EQ                ; |219| 
        ; branch occurs ; |219| 
L16:    
	.line	12
        SUBB      SP,#1
        LRETR
        ; return occurs
	.endfunc	228,000000000h,1



	.sect	".text"
	.global	_Toggle_STE
	.sym	_Toggle_STE,_Toggle_STE, 32, 2, 0
	.func	230

;***************************************************************
;* FNAME: _Toggle_STE                   FR SIZE:   1           *
;*                                                             *
;* FUNCTION ENVIRONMENT                                        *
;*                                                             *
;* FUNCTION PROPERTIES                                         *
;*                            0 Parameter,  1 Auto,  0 SOE     *
;***************************************************************

_Toggle_STE:
	.line	2
;* AL    assigned to _state
	.sym	_state,0, 4, 17, 16
	.sym	_state,-1, 4, 1, 16
        ADDB      SP,#1
        MOV       *-SP[1],AL            ; |231| 
	.line	3
        B         L19,UNC               ; |232| 
        ; branch occurs ; |232| 
L17:    
	.line	6
        MOVW      DP,#_GpioDataRegs+22
        MOV       @_GpioDataRegs+22,#8  ; |235| 
        B         L20,UNC               ; |235| 
        ; branch occurs ; |235| 
L18:    
	.line	9
        MOVW      DP,#_GpioDataRegs+21
        MOV       @_GpioDataRegs+21,#8  ; |238| 
        B         L20,UNC               ; |238| 
        ; branch occurs ; |238| 
L19:    
	.line	3
        CMPB      AL,#0                 ; |232| 
        BF        L17,EQ                ; |232| 
        ; branch occurs ; |232| 
        CMPB      AL,#1                 ; |232| 
        BF        L18,EQ                ; |232| 
        ; branch occurs ; |232| 
L20:    
	.line	12
        SUBB      SP,#1
        LRETR
        ; return occurs
	.endfunc	241,000000000h,1


;***************************************************************
;* UNDEFINED EXTERNAL REFERENCES                               *
;***************************************************************
	.global	_InitPieVectTable
	.global	_InitSysCtrl
	.global	_InitGpio
	.global	_InitPieCtrl
	.global	_SpiaRegs
	.global	_GpioDataRegs
	.global	_GpioMuxRegs
	.global	_McbspaRegs

;***************************************************************
;* TYPE INFORMATION                                            *
;***************************************************************
	.sym	_Uint16, 0, 14, 13, 16
	.sym	_Uint16, 0, 14, 13, 16
	.stag	_SPICCR_BITS, 16
	.member	_SPICHAR, 0, 14, 18, 4
	.member	_SPILBK, 4, 14, 18, 1
	.member	_rsvd1, 5, 14, 18, 1
	.member	_CLKPOLARITY, 6, 14, 18, 1
	.member	_RESET, 7, 14, 18, 1
	.member	_rsvd2, 8, 14, 18, 8
	.eos
	.utag	_SPICCR_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _SPICCR_BITS
	.eos
	.stag	_SPICTL_BITS, 16
	.member	_SPIINTENA, 0, 14, 18, 1
	.member	_TALK, 1, 14, 18, 1
	.member	_MASTER_SLAVE, 2, 14, 18, 1
	.member	_CLK_PHASE, 3, 14, 18, 1
	.member	_OVERRUN, 4, 14, 18, 1
	.member	_rsvd, 5, 14, 18, 11
	.eos
	.utag	_SPICTL_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _SPICTL_BITS
	.eos
	.stag	_SPIFFTX_BITS, 16
	.member	_TXFFIL, 0, 14, 18, 5
	.member	_TXFFIENA, 5, 14, 18, 1
	.member	_TXFFINTINTCLR, 6, 14, 18, 1
	.member	_TXFFINT, 7, 14, 18, 1
	.member	_TXFFST, 8, 14, 18, 5
	.member	_TXFIFORESET, 13, 14, 18, 1
	.member	_rsvd, 14, 14, 18, 1
	.eos
	.utag	_SPIFFTX_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _SPIFFTX_BITS
	.eos
	.stag	_SPIFFRX_BITS, 16
	.member	_RXFFIL, 0, 14, 18, 5
	.member	_RXFFIENA, 5, 14, 18, 1
	.member	_RXFFINTCLR, 6, 14, 18, 1
	.member	_RXFFINT, 7, 14, 18, 1
	.member	_RXFFST, 8, 14, 18, 5
	.member	_RXFIFORESET, 13, 14, 18, 1
	.member	_RXFFOVFCLR, 14, 14, 18, 1
	.member	_RXFFOVF, 15, 14, 18, 1
	.eos
	.utag	_SPIFFRX_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _SPIFFRX_BITS
	.eos
	.stag	_SPIFFCT_BITS, 16
	.member	_TXDLY, 0, 14, 18, 8
	.member	_rsvd, 8, 14, 18, 8
	.eos
	.utag	_SPIFFCT_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _SPIFFCT_BITS
	.eos
	.stag	_SPISTS_BITS, 16
	.member	_rsvd1, 0, 14, 18, 5
	.member	_BUFFULL_FLAG, 5, 14, 18, 1
	.member	_INT_FLAG, 6, 14, 18, 1
	.member	_OVERRUN_FLAG, 7, 14, 18, 1
	.member	_rsvd2, 8, 14, 18, 8
	.eos
	.utag	_SPISTS_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _SPISTS_BITS
	.eos
	.stag	_SPIPRI_BITS, 16
	.member	_rsvd1, 0, 14, 18, 4
	.member	_FREE, 4, 14, 18, 1
	.member	_SOFT, 5, 14, 18, 1
	.member	_PRIORITY, 6, 14, 18, 1
	.member	_rsvd2, 7, 14, 18, 9
	.eos
	.utag	_SPIPRI_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _SPIPRI_BITS
	.eos
	.stag	_SPI_REGS, 256
	.member	_SPICCR, 0, 9, 8, 16, _SPICCR_REG
	.member	_SPICTL, 16, 9, 8, 16, _SPICTL_REG
	.member	_SPISTS, 32, 9, 8, 16, _SPISTS_REG
	.member	_rsvd1, 48, 14, 8, 16
	.member	_SPIBRR, 64, 14, 8, 16
	.member	_rsvd2, 80, 14, 8, 16
	.member	_SPIRXEMU, 96, 14, 8, 16
	.member	_SPIRXBUF, 112, 14, 8, 16
	.member	_SPITXBUF, 128, 14, 8, 16
	.member	_SPIDAT, 144, 14, 8, 16
	.member	_SPIFFTX, 160, 9, 8, 16, _SPIFFTX_REG
	.member	_SPIFFRX, 176, 9, 8, 16, _SPIFFRX_REG
	.member	_SPIFFCT, 192, 9, 8, 16, _SPIFFCT_REG
	.member	_rsvd3, 208, 62, 8, 32, , 2
	.member	_SPIPRI, 240, 9, 8, 16, _SPIPRI_REG
	.eos
	.stag	_DRR2_BITS, 16
	.member	_HWLB, 0, 14, 18, 8
	.member	_HWHB, 8, 14, 18, 8
	.eos
	.utag	_DRR2_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _DRR2_BITS
	.eos
	.stag	_DRR1_BITS, 16
	.member	_LWLB, 0, 14, 18, 8
	.member	_LWHB, 8, 14, 18, 8
	.eos
	.utag	_DRR1_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _DRR1_BITS
	.eos
	.stag	_DXR2_BITS, 16
	.member	_HWLB, 0, 14, 18, 8
	.member	_HWHB, 8, 14, 18, 8
	.eos
	.utag	_DXR2_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _DXR2_BITS
	.eos
	.stag	_DXR1_BITS, 16
	.member	_LWLB, 0, 14, 18, 8
	.member	_LWHB, 8, 14, 18, 8
	.eos
	.utag	_DXR1_REG, 16
	.member	_all, 0, 14, 11, 16
	.member	_bit, 0, 8, 11, 16, _DXR1_BITS
12345

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