example_281xecanback2back1.c

dsp2812中关于can总线的例程

/*********************************************************************
* Filename: MBXRAMRW.c                                               *
*                                                                    *
* Description: This code checks the integrity and correct            *
*              functionality of the mailbox RAM in the CAN module.   *
*                                                                    *
* This test writes patterns such as 0000h, FFFFh, 5555h, AAAAh to all
* the 32 mailboxes and reads them back for verification.             *
* Any error is flagged.  
*                                            
* Last update: 12/24/2002                                            *
*********************************************************************/

#include "DSP281x_Device.h"     // DSP281x Headerfile Include File
#include "DSP281x_Examples.h"   // DSP281x Examples Include File

#define COUNT  100000  // Mailbox RAM test will take place (COUNT) times..

Uint32   i;
Uint32	 d;
Uint32	 loopcount = 0; // Counts the # of times the loop actually ran
Uint32   errorcount = 0;

Uint32 TestMbox1 = 0;

void MBXrd(long d);  	/* This function reads from all 32 MBOXes */
void MBXwr(long d);		/* This function writes to all 32 MBOXes */  

void InitECan(void);

main() 
{  
   // eCAN control registers require read/write access using 32-bits.  Thus we
   // will create a set of shadow registers for this example.  These shadow
   // registers will be used to make sure the access is 32-bits and not 16.
   struct ECAN_REGS ECanaShadow; 
   
   // Step 1. Initialize System Control:
   // PLL, WatchDog, enable Peripheral Clocks
   // This example function is found in the DSP281x_SysCtrl.c file.
   InitSysCtrl();
   
   // Step 2. Initalize GPIO: 
   // This example function is found in the DSP281x_Gpio.c file and
   // illustrates how to set the GPIO to it's default state.
   // InitGpio();  // Skipped for this example  
   // For this example, configure CAN pins using GPIO regs here
   EALLOW;
   GpioMuxRegs.GPFMUX.bit.CANTXA_GPIOF6 = 1;
   GpioMuxRegs.GPFMUX.bit.CANRXA_GPIOF7 = 1;
   EDIS;
   
   // Step 3. Clear all interrupts and initialize PIE vector table:
   // Disable CPU interrupts 
   DINT;

   // Initialize PIE control registers to their default state.
   // The default state is all PIE interrupts disabled and flags
   // are cleared.  
   // This function is found in the DSP281x_PieCtrl.c file.
   InitPieCtrl();
   
   // Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;
   
   // Initialize the PIE vector table with pointers to the shell Interrupt 
   // Service Routines (ISR).  
   // This will populate the entire table, even if the interrupt
   // is not used in this example.  This is useful for debug purposes.
   // The shell ISR routines are found in DSP281x_DefaultIsr.c.
   // This function is found in DSP281x_PieVect.c.
   InitPieVectTable();

   // Step 4. Initialize all the Device Peripherals:
   // This function is found in DSP281x_InitPeripherals.c
   // InitPeripherals(); // Not required for this example
   
   // eCAN control registers require 32-bit access. 
    // If you want to write to a single bit, the compiler may break this
    // access into a 16-bit access.  One solution, that is presented here,
    // is to use a shadow register to force the 32-bit access. 
     
    // Read the entire register into a shadow register.  This access
    // will be 32-bits.  Change the desired bit and copy the value back
    // to the eCAN register with a 32-bit write. 
   
    // Configure the eCAN RX and TX pins for eCAN transmissions
    EALLOW;
    ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
    ECanaShadow.CANTIOC.bit.TXFUNC = 1;
    ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;

    ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
    ECanaShadow.CANRIOC.bit.RXFUNC = 1;
    ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;
    EDIS;

/* Enable all Mailboxes */
	
	ECanaRegs.CANME.all = 0xFFFFFFFF;
	
/* Write to the mailbox RAM field of MBOX0 - 31 */    
     
    /* while(1) */		              // Uncomment this line for infinite iterations
    for(i=0; i < COUNT; i++)		  // Uncomment this line for finite iterations			  	
    {
     d = 0xFFFFFFFF; 
     MBXwr(d);         
     MBXrd(d);
     d = 0x00000000; 
     MBXwr(d);         
     MBXrd(d);
     d = 0x55555555; 
     MBXwr(d);         
     MBXrd(d);
     d = 0xAAAAAAAA; 
     MBXwr(d);         
     MBXrd(d);
     loopcount++;
    }   

asm(" ESTOP0");

}

// Write the passed data to all 32 mailboxes

void MBXwr(int32 MBXdata) 
	{
	int j;
	volatile struct MBOX *Mailbox  = (void *) 0x6100;   
		
		for(j=0; j<32; j++)								 
		{
		
		Mailbox->MDH.all = MBXdata;
		Mailbox->MDL.all = MBXdata;
		Mailbox = Mailbox + 1; 
		
		}			
	} 

// Check if all 32 mailboxes contain the passed data

void MBXrd(int32 MBXdata) 
	{	
	int j;
	volatile struct MBOX *Mailbox  = (void *) 0x6100;   
		
		for(j=0; j<32; j++)								 
		{
		
		TestMbox1 = Mailbox->MDL.all;	
		if (TestMbox1 != d)
		 {errorcount++;}
		 
		TestMbox1 = Mailbox->MDH.all;	
		if (TestMbox1 != d) 
		 {errorcount++;}
		 
		Mailbox = Mailbox + 1; 
		
		}	 
	} 
	
/* This code may be used to exercise and check the correct functionality
of the mailbox RAM */