📄 rxloop_1.c
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/*********************************************************************
* Filename: RXLOOP.c *
* *
* Description: This test is a simple example of how data may be received
* in 28x CAN.
*
* This program runs on Node B. CANalyzer is used as node A in this example.
* All mailboxes are configured as receive mailboxes. Each mailbox
* has a different ID. All mailboxes in node A are allowed to transmit
* in a sequence to mailboxes in node B. Once the cycle is complete,
* the cycle is started all over again.
* This program loops forever. The # of times the receive loop is executed
* is stored in the RXCOUNT value.
*
* Last update: 12/24/2002
*********************************************************************/
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "DSP281x_Examples.h" // DSP281x Examples Include File
Uint32 RXCOUNT = 0;
Uint32 i;
main()
{
/* Create a shadow register structure for the CAN control registers. This is
needed, since, only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents. This is
especially true while writing to a bit (or group of bits) among bits 16 - 31 */
struct ECAN_REGS ECanaShadow;
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP281x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initalize GPIO:
// This example function is found in the DSP281x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// For this example, configure CAN pins using GPIO regs here
EALLOW;
GpioMuxRegs.GPFMUX.bit.CANTXA_GPIOF6 = 1;
GpioMuxRegs.GPFMUX.bit.CANRXA_GPIOF7 = 1;
EDIS;
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP281x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP281x_DefaultIsr.c.
// This function is found in DSP281x_PieVect.c.
InitPieVectTable();
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP281x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
// Step 5. User specific code, enable interrupts:
// eCAN control registers require 32-bit access.
// If you want to write to a single bit, the compiler may break this
// access into a 16-bit access. One solution, that is presented here,
// is to use a shadow register to force the 32-bit access.
// Read the entire register into a shadow register. This access
// will be 32-bits. Change the desired bit and copy the value back
// to the eCAN register with a 32-bit write.
// Configure the eCAN RX and TX pins for eCAN transmissions
EALLOW;
ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
ECanaShadow.CANTIOC.bit.TXFUNC = 1;
ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;
ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
ECanaShadow.CANRIOC.bit.RXFUNC = 1;
ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;
EDIS;
// Disable all Mailboxes
// Since this write is to the entire register (instead of a bit
// field) a shadow register is not required.
/* Write to the MSGID field - MBX number is written as its MSGID */
ECanaMboxes.MBOX1.MSGID.all = 0x00000001; // Std identifier
/* Note: If writing to only the 11-bit identifier as by
"ECanaMboxes.MBOX0.MSGID.bit.MSGID_H = 0x00C8", IDE, AME & AAM
bit fields also need to be initialized. Otherwise, they
may assume random values */
/* Configure Mailboxes as Receive mailboxes */
ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
ECanaShadow.CANMD.all = 0xFFFFFFFF;
ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;
/* Enable Mailboxes */
ECanaShadow.CANME.all = ECanaRegs.CANME.all;
ECanaShadow.CANME.all = 0x00000001;
ECanaRegs.CANME.all = ECanaShadow.CANME.all;
/* Begin receiving */
while(1)
{
while( ECanaRegs.CANRMP.all == 0x00000001 ) {} // Wait for all RMPn to be set..
ECanaRegs.CANRMP.all = 0xFFFFFFFF; // Clear all RMPn bits and start
RXCOUNT++ ; // all over again...
}
}
/* CANalyzer configuration file: RXLOOP.CFG... */
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