setpmoto.tan.qmsg

这是一个用VHDL语言写的电动机程序,希望对大家有用

{ "Info" "ITDB_TH_RESULT" "step_motor:inst1\|comp\[10\] SPEED\[0\] GCLK3 6.345 ns register " "Info: th for register \"step_motor:inst1\|comp\[10\]\" (data pin = \"SPEED\[0\]\", clock pin = \"GCLK3\") is 6.345 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "GCLK3 destination 12.609 ns + Longest register " "Info: + Longest clock path from clock \"GCLK3\" to destination register is 12.609 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns GCLK3 1 CLK PIN_64 18 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_64; Fanout = 18; CLK Node = 'GCLK3'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "" { GCLK3 } "NODE_NAME" } "" } } { "SETPMOTO.bdf" "" { Schematic "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/SETPMOTO.bdf" { { 144 -56 112 160 "GCLK3" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.377 ns) + CELL(1.294 ns) 3.834 ns fenping:inst\|QN\[16\] 2 REG LC_X3_Y3_N7 27 " "Info: 2: + IC(1.377 ns) + CELL(1.294 ns) = 3.834 ns; Loc. = LC_X3_Y3_N7; Fanout = 27; REG Node = 'fenping:inst\|QN\[16\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "2.671 ns" { GCLK3 fenping:inst|QN[16] } "NODE_NAME" } "" } } { "fenping.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/fenping.vhd" 15 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.212 ns) + CELL(1.294 ns) 8.340 ns step_motor:inst1\|osc 3 REG LC_X2_Y3_N0 13 " "Info: 3: + IC(3.212 ns) + CELL(1.294 ns) = 8.340 ns; Loc. = LC_X2_Y3_N0; Fanout = 13; REG Node = 'step_motor:inst1\|osc'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "4.506 ns" { fenping:inst|QN[16] step_motor:inst1|osc } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 21 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.351 ns) + CELL(0.918 ns) 12.609 ns step_motor:inst1\|comp\[10\] 4 REG LC_X5_Y2_N5 6 " "Info: 4: + IC(3.351 ns) + CELL(0.918 ns) = 12.609 ns; Loc. = LC_X5_Y2_N5; Fanout = 6; REG Node = 'step_motor:inst1\|comp\[10\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "4.269 ns" { step_motor:inst1|osc step_motor:inst1|comp[10] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 20 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.669 ns 37.03 % " "Info: Total cell delay = 4.669 ns ( 37.03 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.940 ns 62.97 % " "Info: Total interconnect delay = 7.940 ns ( 62.97 % )" {  } {  } 0}  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "12.609 ns" { GCLK3 fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[10] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "12.609 ns" { GCLK3 GCLK3~combout fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[10] } { 0.000ns 0.000ns 1.377ns 3.212ns 3.351ns } { 0.000ns 1.163ns 1.294ns 1.294ns 0.918ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.221 ns + " "Info: + Micro hold delay of destination is 0.221 ns" {  } { { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 20 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.485 ns - Shortest pin register " "Info: - Shortest pin to register delay is 6.485 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns SPEED\[0\] 1 PIN PIN_47 33 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_47; Fanout = 33; PIN Node = 'SPEED\[0\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "" { SPEED[0] } "NODE_NAME" } "" } } { "SETPMOTO.bdf" "" { Schematic "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/SETPMOTO.bdf" { { 192 208 376 208 "SPEED\[1..0\]" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.292 ns) + CELL(1.061 ns) 6.485 ns step_motor:inst1\|comp\[10\] 2 REG LC_X5_Y2_N5 6 " "Info: 2: + IC(4.292 ns) + CELL(1.061 ns) = 6.485 ns; Loc. = LC_X5_Y2_N5; Fanout = 6; REG Node = 'step_motor:inst1\|comp\[10\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "5.353 ns" { SPEED[0] step_motor:inst1|comp[10] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 20 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.193 ns 33.82 % " "Info: Total cell delay = 2.193 ns ( 33.82 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.292 ns 66.18 % " "Info: Total interconnect delay = 4.292 ns ( 66.18 % )" {  } {  } 0}  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "6.485 ns" { SPEED[0] step_motor:inst1|comp[10] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "6.485 ns" { SPEED[0] SPEED[0]~combout step_motor:inst1|comp[10] } { 0.000ns 0.000ns 4.292ns } { 0.000ns 1.132ns 1.061ns } } }  } 0}  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "12.609 ns" { GCLK3 fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[10] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "12.609 ns" { GCLK3 GCLK3~combout fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[10] } { 0.000ns 0.000ns 1.377ns 3.212ns 3.351ns } { 0.000ns 1.163ns 1.294ns 1.294ns 0.918ns } } } { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "6.485 ns" { SPEED[0] step_motor:inst1|comp[10] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "6.485 ns" { SPEED[0] SPEED[0]~combout step_motor:inst1|comp[10] } { 0.000ns 0.000ns 4.292ns } { 0.000ns 1.132ns 1.061ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 3 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Oct 21 18:36:10 2006 " "Info: Processing ended: Sat Oct 21 18:36:10 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}