setpmoto.tan.qmsg

这是一个用VHDL语言写的电动机程序,希望对大家有用

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "GCLK3 " "Info: Assuming node \"GCLK3\" is an undefined clock" {  } { { "SETPMOTO.bdf" "" { Schematic "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/SETPMOTO.bdf" { { 144 -56 112 160 "GCLK3" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "GCLK3" } } } }  } 0}  } {  } 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "3 " "Warning: Found 3 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "step_motor:inst1\|osc " "Info: Detected ripple clock \"step_motor:inst1\|osc\" as buffer" {  } { { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 21 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "step_motor:inst1\|osc" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "fenping:inst\|QN\[16\] " "Info: Detected ripple clock \"fenping:inst\|QN\[16\]\" as buffer" {  } { { "fenping.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/fenping.vhd" 15 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fenping:inst\|QN\[16\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "step_motor:inst1\|clk_scan " "Info: Detected ripple clock \"step_motor:inst1\|clk_scan\" as buffer" {  } { { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 17 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "step_motor:inst1\|clk_scan" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "GCLK3 register step_motor:inst1\|comp\[4\] register step_motor:inst1\|d_ff\[6\] 72.29 MHz 13.834 ns Internal " "Info: Clock \"GCLK3\" has Internal fmax of 72.29 MHz between source register \"step_motor:inst1\|comp\[4\]\" and destination register \"step_motor:inst1\|d_ff\[6\]\" (period= 13.834 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.480 ns + Longest register register " "Info: + Longest register to register delay is 8.480 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns step_motor:inst1\|comp\[4\] 1 REG LC_X4_Y2_N9 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X4_Y2_N9; Fanout = 5; REG Node = 'step_motor:inst1\|comp\[4\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "" { step_motor:inst1|comp[4] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 20 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.651 ns) + CELL(0.747 ns) 3.398 ns step_motor:inst1\|LessThan~570 2 COMB LC_X4_Y3_N8 1 " "Info: 2: + IC(2.651 ns) + CELL(0.747 ns) = 3.398 ns; Loc. = LC_X4_Y3_N8; Fanout = 1; COMB Node = 'step_motor:inst1\|LessThan~570'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "3.398 ns" { step_motor:inst1|comp[4] step_motor:inst1|LessThan~570 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.399 ns) 3.797 ns step_motor:inst1\|LessThan~565 3 COMB LC_X4_Y3_N9 1 " "Info: 3: + IC(0.000 ns) + CELL(0.399 ns) = 3.797 ns; Loc. = LC_X4_Y3_N9; Fanout = 1; COMB Node = 'step_motor:inst1\|LessThan~565'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "0.399 ns" { step_motor:inst1|LessThan~570 step_motor:inst1|LessThan~565 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.246 ns) 4.043 ns step_motor:inst1\|LessThan~539 4 COMB LC_X5_Y3_N4 1 " "Info: 4: + IC(0.000 ns) + CELL(0.246 ns) = 4.043 ns; Loc. = LC_X5_Y3_N4; Fanout = 1; COMB Node = 'step_motor:inst1\|LessThan~539'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "0.246 ns" { step_motor:inst1|LessThan~565 step_motor:inst1|LessThan~539 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.975 ns) 5.018 ns step_motor:inst1\|LessThan~532 5 COMB LC_X5_Y3_N5 13 " "Info: 5: + IC(0.000 ns) + CELL(0.975 ns) = 5.018 ns; Loc. = LC_X5_Y3_N5; Fanout = 13; COMB Node = 'step_motor:inst1\|LessThan~532'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "0.975 ns" { step_motor:inst1|LessThan~539 step_motor:inst1|LessThan~532 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.702 ns) + CELL(1.760 ns) 8.480 ns step_motor:inst1\|d_ff\[6\] 6 REG LC_X7_Y3_N0 5 " "Info: 6: + IC(1.702 ns) + CELL(1.760 ns) = 8.480 ns; Loc. = LC_X7_Y3_N0; Fanout = 5; REG Node = 'step_motor:inst1\|d_ff\[6\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "3.462 ns" { step_motor:inst1|LessThan~532 step_motor:inst1|d_ff[6] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 52 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.127 ns 48.67 % " "Info: Total cell delay = 4.127 ns ( 48.67 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.353 ns 51.33 % " "Info: Total interconnect delay = 4.353 ns ( 51.33 % )" {  } {  } 0}  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "8.480 ns" { step_motor:inst1|comp[4] step_motor:inst1|LessThan~570 step_motor:inst1|LessThan~565 step_motor:inst1|LessThan~539 step_motor:inst1|LessThan~532 step_motor:inst1|d_ff[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "8.480 ns" { step_motor:inst1|comp[4] step_motor:inst1|LessThan~570 step_motor:inst1|LessThan~565 step_motor:inst1|LessThan~539 step_motor:inst1|LessThan~532 step_motor:inst1|d_ff[6] } { 0.000ns 2.651ns 0.000ns 0.000ns 0.000ns 1.702ns } { 0.000ns 0.747ns 0.399ns 0.246ns 0.975ns 1.760ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-4.645 ns - Smallest " "Info: - Smallest clock skew is -4.645 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "GCLK3 destination 7.964 ns + Shortest register " "Info: + Shortest clock path from clock \"GCLK3\" to destination register is 7.964 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns GCLK3 1 CLK PIN_64 18 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_64; Fanout = 18; CLK Node = 'GCLK3'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "" { GCLK3 } "NODE_NAME" } "" } } { "SETPMOTO.bdf" "" { Schematic "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/SETPMOTO.bdf" { { 144 -56 112 160 "GCLK3" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.377 ns) + CELL(1.294 ns) 3.834 ns fenping:inst\|QN\[16\] 2 REG LC_X3_Y3_N7 27 " "Info: 2: + IC(1.377 ns) + CELL(1.294 ns) = 3.834 ns; Loc. = LC_X3_Y3_N7; Fanout = 27; REG Node = 'fenping:inst\|QN\[16\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "2.671 ns" { GCLK3 fenping:inst|QN[16] } "NODE_NAME" } "" } } { "fenping.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/fenping.vhd" 15 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.212 ns) + CELL(0.918 ns) 7.964 ns step_motor:inst1\|d_ff\[6\] 3 REG LC_X7_Y3_N0 5 " "Info: 3: + IC(3.212 ns) + CELL(0.918 ns) = 7.964 ns; Loc. = LC_X7_Y3_N0; Fanout = 5; REG Node = 'step_motor:inst1\|d_ff\[6\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "4.130 ns" { fenping:inst|QN[16] step_motor:inst1|d_ff[6] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 52 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.375 ns 42.38 % " "Info: Total cell delay = 3.375 ns ( 42.38 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.589 ns 57.62 % " "Info: Total interconnect delay = 4.589 ns ( 57.62 % )" {  } {  } 0}  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "7.964 ns" { GCLK3 fenping:inst|QN[16] step_motor:inst1|d_ff[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "7.964 ns" { GCLK3 GCLK3~combout fenping:inst|QN[16] step_motor:inst1|d_ff[6] } { 0.000ns 0.000ns 1.377ns 3.212ns } { 0.000ns 1.163ns 1.294ns 0.918ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "GCLK3 source 12.609 ns - Longest register " "Info: - Longest clock path from clock \"GCLK3\" to source register is 12.609 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns GCLK3 1 CLK PIN_64 18 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_64; Fanout = 18; CLK Node = 'GCLK3'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "" { GCLK3 } "NODE_NAME" } "" } } { "SETPMOTO.bdf" "" { Schematic "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/SETPMOTO.bdf" { { 144 -56 112 160 "GCLK3" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.377 ns) + CELL(1.294 ns) 3.834 ns fenping:inst\|QN\[16\] 2 REG LC_X3_Y3_N7 27 " "Info: 2: + IC(1.377 ns) + CELL(1.294 ns) = 3.834 ns; Loc. = LC_X3_Y3_N7; Fanout = 27; REG Node = 'fenping:inst\|QN\[16\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "2.671 ns" { GCLK3 fenping:inst|QN[16] } "NODE_NAME" } "" } } { "fenping.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/fenping.vhd" 15 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.212 ns) + CELL(1.294 ns) 8.340 ns step_motor:inst1\|osc 3 REG LC_X2_Y3_N0 13 " "Info: 3: + IC(3.212 ns) + CELL(1.294 ns) = 8.340 ns; Loc. = LC_X2_Y3_N0; Fanout = 13; REG Node = 'step_motor:inst1\|osc'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "4.506 ns" { fenping:inst|QN[16] step_motor:inst1|osc } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 21 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.351 ns) + CELL(0.918 ns) 12.609 ns step_motor:inst1\|comp\[4\] 4 REG LC_X4_Y2_N9 5 " "Info: 4: + IC(3.351 ns) + CELL(0.918 ns) = 12.609 ns; Loc. = LC_X4_Y2_N9; Fanout = 5; REG Node = 'step_motor:inst1\|comp\[4\]'" {  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "4.269 ns" { step_motor:inst1|osc step_motor:inst1|comp[4] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 20 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.669 ns 37.03 % " "Info: Total cell delay = 4.669 ns ( 37.03 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.940 ns 62.97 % " "Info: Total interconnect delay = 7.940 ns ( 62.97 % )" {  } {  } 0}  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "12.609 ns" { GCLK3 fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "12.609 ns" { GCLK3 GCLK3~combout fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[4] } { 0.000ns 0.000ns 1.377ns 3.212ns 3.351ns } { 0.000ns 1.163ns 1.294ns 1.294ns 0.918ns } } }  } 0}  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "7.964 ns" { GCLK3 fenping:inst|QN[16] step_motor:inst1|d_ff[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "7.964 ns" { GCLK3 GCLK3~combout fenping:inst|QN[16] step_motor:inst1|d_ff[6] } { 0.000ns 0.000ns 1.377ns 3.212ns } { 0.000ns 1.163ns 1.294ns 0.918ns } } } { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "12.609 ns" { GCLK3 fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "12.609 ns" { GCLK3 GCLK3~combout fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[4] } { 0.000ns 0.000ns 1.377ns 3.212ns 3.351ns } { 0.000ns 1.163ns 1.294ns 1.294ns 0.918ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.376 ns + " "Info: + Micro clock to output delay of source is 0.376 ns" {  } { { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 20 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.333 ns + " "Info: + Micro setup delay of destination is 0.333 ns" {  } { { "step_motor.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/step_motor.vhd" 52 -1 0 } }  } 0}  } { { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "8.480 ns" { step_motor:inst1|comp[4] step_motor:inst1|LessThan~570 step_motor:inst1|LessThan~565 step_motor:inst1|LessThan~539 step_motor:inst1|LessThan~532 step_motor:inst1|d_ff[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "8.480 ns" { step_motor:inst1|comp[4] step_motor:inst1|LessThan~570 step_motor:inst1|LessThan~565 step_motor:inst1|LessThan~539 step_motor:inst1|LessThan~532 step_motor:inst1|d_ff[6] } { 0.000ns 2.651ns 0.000ns 0.000ns 0.000ns 1.702ns } { 0.000ns 0.747ns 0.399ns 0.246ns 0.975ns 1.760ns } } } { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "7.964 ns" { GCLK3 fenping:inst|QN[16] step_motor:inst1|d_ff[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "7.964 ns" { GCLK3 GCLK3~combout fenping:inst|QN[16] step_motor:inst1|d_ff[6] } { 0.000ns 0.000ns 1.377ns 3.212ns } { 0.000ns 1.163ns 1.294ns 0.918ns } } } { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO_cmp.qrpt" Compiler "SETPMOTO" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/db/SETPMOTO.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/SETPMOTO/" "" "12.609 ns" { GCLK3 fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "12.609 ns" { GCLK3 GCLK3~combout fenping:inst|QN[16] step_motor:inst1|osc step_motor:inst1|comp[4] } { 0.000ns 0.000ns 1.377ns 3.212ns 3.351ns } { 0.000ns 1.163ns 1.294ns 1.294ns 0.918ns } } }  } 0}