seg7disp.map.summary

这是一个用VHDL语言写的数码管程序.有用着

Flow Status : Successful - Sat Oct 21 18:06:49 2006
Quartus II Version : 5.0 Build 171 11/03/2005 SP 2 SJ Full Version
Revision Name : SEG7DISP
Top-level Entity Name : SEG7DISP
Family : MAX II
Device : EPM240T100C5
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 43
Total pins : 21
Total virtual pins : 0
UFM blocks : 0