seg7disp.tan.summary

这是一个用VHDL语言写的数码管程序.有用着

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 14.816 ns
From           : Seg7_Dsp:inst|NUMOUT[3]
To             : SG[1]
From Clock     : GCLK3
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'GCLK3'
Slack          : N/A
Required Time  : None
Actual Time    : 197.47 MHz ( period = 5.064 ns )
From           : Seg7_Dsp:inst|\Free_Counter:Q[0]
To             : Seg7_Dsp:inst|NUMOUT[2]
From Clock     : GCLK3
To Clock       : GCLK3
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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