fengping.fit.summary

这是一个用VHDL语言写的分频程序,可用得着

Flow Status : Successful - Sat Oct 21 21:27:56 2006
Quartus II Version : 5.0 Build 171 11/03/2005 SP 2 SJ Full Version
Revision Name : FENGPING
Top-level Entity Name : FENGPING
Family : MAX II
Device : EPM240T100C5
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 27 / 240 ( 11 % )
Total pins : 4 / 80 ( 5 % )
Total virtual pins : 0
UFM blocks : 0 / 1 ( 0 % )