music.fit.qmsg

上个用VHDL语言写的音乐程序,希望对大家能够有帮助

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version " "Info: Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Oct 21 21:19:01 2006 " "Info: Processing started: Sat Oct 21 21:19:01 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off MUSIC -c MUSIC " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off MUSIC -c MUSIC" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "MUSIC EPM240T100C5 " "Info: Selected device EPM240T100C5 for design \"MUSIC\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM240T100I5 " "Info: Device EPM240T100I5 is compatible" {  } {  } 2} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T100C5 " "Info: Device EPM570T100C5 is compatible" {  } {  } 2} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T100I5 " "Info: Device EPM570T100I5 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1000 MHz " "Info: Assuming a global fmax requirement of 1000 MHz" {  } {  } 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tsu 2.0 ns " "Info: Assuming a global tsu requirement of 2.0 ns" {  } {  } 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tco 1.0 ns " "Info: Assuming a global tco requirement of 1.0 ns" {  } {  } 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tpd 1.0 ns " "Info: Assuming a global tpd requirement of 1.0 ns" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "GCLK3 Global clock in PIN 64 " "Info: Automatically promoted signal \"GCLK3\" to use Global clock in PIN 64" {  } { { "MUSIC.bdf" "" { Schematic "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/MUSIC.bdf" { { 160 -136 32 176 "GCLK3" "" } } } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "Songer:inst1\|ToneTaba:u2\|Mux~799 Global clock " "Info: Automatically promoted signal \"Songer:inst1\|ToneTaba:u2\|Mux~799\" to use Global clock" {  } { { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Songer:inst1\|ToneTaba:u2\|Mux~799" } } } } { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/db/MUSIC_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/db/MUSIC_cmp.qrpt" Compiler "MUSIC" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/db/MUSIC.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/" "" "" { Songer:inst1|ToneTaba:u2|Mux~799 } "NODE_NAME" } "" } } { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/MUSIC.fld" "" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/MUSIC.fld" "" "" { Songer:inst1|ToneTaba:u2|Mux~799 } "NODE_NAME" } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "Songer:inst1\|Speakera:u3\|LessThan~40 Global clock " "Info: Automatically promoted signal \"Songer:inst1\|Speakera:u3\|LessThan~40\" to use Global clock" {  } { { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Songer:inst1\|Speakera:u3\|LessThan~40" } } } } { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/db/MUSIC_cmp.qrpt" "" { Report "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/db/MUSIC_cmp.qrpt" Compiler "MUSIC" "UNKNOWN" "V1" "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/db/MUSIC.quartus_db" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/" "" "" { Songer:inst1|Speakera:u3|LessThan~40 } "NODE_NAME" } "" } } { "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/MUSIC.fld" "" { Floorplan "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/MUSIC.fld" "" "" { Songer:inst1|Speakera:u3|LessThan~40 } "NODE_NAME" } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "fenping:inst\|QN\[20\] Global clock " "Info: Automatically promoted some destinations of signal \"fenping:inst\|QN\[20\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "fenping:inst\|QN\[20\] " "Info: Destination \"fenping:inst\|QN\[20\]\" may be non-global or may not use global clock" {  } { { "fenping.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/fenping.vhd" 15 -1 0 } }  } 0}  } { { "fenping.vhd" "" { Text "E:/EDA/cdrom/mcu_usb_cpld/PLD实验/MUSIC/fenping.vhd" 15 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}