📄 stmd.asm
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spi_stc: ; SPI transfer complete handler
ldi temp1, 18 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; ************************************************************************
usart_rxc: ; USART, RX complete handler
ldi temp1, 19 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; ************************************************************************
usart_udre: ; USART, UDR empty handler
ldi temp1, 20 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; ************************************************************************
usart_txc: ; USART, TX complete handler
ldi temp1, 21 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; *************************************************************************
ADC_com: ; ADC conversion complete handler
ldi temp1, 22 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; *************************************************************************
ee_rdy: ; EEPROM ready handler
ldi temp1, 23 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; ************************************************************************
ana_comp: ; analog comparator handler
ldi temp1, 24 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; ************************************************************************
twi: ; 2-wire serial interface handler
ldi temp1, 25 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; ************************************************************************
spm_rdy: ; store program memory ready handler
ldi temp1, 26 ; fault code
mov fault_code, temp1
rjmp fault_trap
reti
; ************************************************************************
rst:
ldi r16, high(RAMEND)
out SPH,r16 ; set stack pointer to top of RAM
ldi r16, low(RAMEND)
out SPL,r16
; ************************************************************************
; configure Port B ; this port drives the Mx pins of the two LMD18245T driver chips
ldi temp1, 0b11111111
; 1------- ; 1 = PB7 is ouput, B Driver - M4
; -1------ ; 1 = PB6 is ouput, B Driver - M3
; --1----- ; 1 = PB5 is ouput, B Driver - M2
; ---1---- ; 1 = PB4 is ouput, B Driver - M1
; ----1--- ; 1 = PB3 is ouput, A Driver - M4
; -----1-- ; 1 = PB2 is ouput, A Driver - M3
; ------1- ; 1 = PB1 is ouput, A Driver - M2
; -------1 ; 1 = PB0 is ouput, A Driver - M1
out DDRB, temp1
ldi temp1, 0b00000000
; 0------- ; 1 = PB7 initially low, B Driver - M4
; -0------ ; 1 = PB6 initially low, B Driver - M3
; --0----- ; 1 = PB5 initially low, B Driver - M2
; ---0---- ; 1 = PB4 initially low, B Driver - M1
; ----0--- ; 1 = PB3 initially low, A Driver - M4
; -----0-- ; 1 = PB2 initially low, A Driver - M3
; ------0- ; 1 = PB1 initially low, A Driver - M2
; -------0 ; 1 = PB0 initially low, A Driver - M1
out PORTB, temp1
; ************************************************************************
; configure Port C
ldi temp1, 0b00000000
; x------- ; reserved
; -x------ ; PC6 is /Reset, pulled high via 10k
; --0----- ; 0 = PC5 is input, spare input
; ---0---- ; 0 = PC4 is input, DIP switch to gnd, test mode select
; ----0--- ; 0 = PC3 is input, DIP switch to gnd, disable mode select: Do we let the motors freewheel, or turn braking on?
; -----0-- ; 0 = PC2 is input, DIP switch to gnd, step mode select2
; ------0- ; 0 = PC1 is input, DIP switch to gnd, step mode select1
; -------0 ; 0 = PC0 is input, DIP switch to gnd, step mode select0
out DDRC, temp1
ldi temp1, 0b01111111
; x------- ; reserved
; -1------ ; 1 = PC6 internal pullup enabled
; --1----- ; 1 = PC5 internal pullup enabled
; ---1---- ; 1 = PC4 internal pullup enabled
; ----1--- ; 1 = PC3 internal pullup enabled
; -----1-- ; 1 = PC2 internal pullup enabled
; ------1- ; 1 = PC1 internal pullup enabled
; -------1 ; 1 = PC0 internal pullup enabled
out PORTC, temp1
; ************************************************************************
; configure Port D
ldi temp1, 0b11100011
; 1------- ; 1 = PD7 is output, idle current reduction enable, 1k0 resistor to DAC_REF pins on drivers.
; DAC_REF pins on drivers are pulled high thru 1k0, so bringing this pin low
; sets up a voltage divider, thereby reducing the DAC_REF voltage
; -1------ ; 1 = PD6 is output, motor brake control, connects to BRAKE pins on drives thru a removeable jumper, goes high to turn braking on
; --1----- ; 1 = PD5 is output, aliveLED to gnd thru 470R, toggles on a 500mS basis
; ---0---- ; 0 = PD4 is input, enable input from opto-isolator, pulled high through 270R, goes low when 5v is applied to input of opto-isolator
; ----0--- ; 0 = PD3 is input, direction input from opto-isolator, pulled high through 270R, goes low when 5v is applied to input of opto-isolator
; -----0-- ; 0 = PD2 is input, step input from opto-isolator, pulled high through 270R, goes low when 5v is applied to input of opto-isolator
; ------1- ; 1 = PD1 is output, goes to B driver - Dir pin
; -------1 ; 1 = PD0 is output, goes to A Driver - Dir pin
out DDRD, temp1
ldi temp1, 0b10011100
; 1------- ; 1 = idle current reduction initially off
; -0------ ; 0 = motor braking initially off
; --0----- ; 0 = aliveLED initially off
; ---111-- ; 111 = enable internal pull-ups for optically isolated inputs
; ------00 ; 0 = DIR pins on A & B drivers is initially low
out PORTD, temp1
; ************************************************************************
; check MCUSR for source of reset
; only power-on reset flag is valid
; all others are trapped
in temp1, MCUSR
sbrc temp1, PORF ; power-on reset?
rjmp continue
wd_reset:
sbrs temp1, WDRF ; watchdog reset?
rjmp brout_reset
ldi temp1, 27 ; fault code
mov fault_code, temp1
rjmp fault_trap
brout_reset:
sbrs temp1, BORF ; brownout reset?
rjmp ext_reset
ldi temp1, 28 ; fault code
mov fault_code, temp1
rjmp fault_trap
ext_reset:
sbrs temp1, EXTRF ; external reset?
rjmp continue
ldi temp1, 29 ; fault code
mov fault_code, temp1
rjmp fault_trap
continue:
; ************************************************************************
; configure timer/counter0 ; we will use timer0 to toggle aliveLED on a 500 ms basis
ldi temp1, 0b00000000
; 00------ ; 00 = normal port operation, OC0A disconnected
; --00---- ; 00 = normal port operation, OC0B disconnected
; ----xx-- ; reserved
; ------00 ; 00 = normal waveform generation mode
out TCCR0A, temp1
ldi temp1, 0b00000100
; 0------- ; 1 = force output compare for channel A
; -0------ ; 1 = force output compare for channel B
; --xx---- ; reserved
; ----0--- ; 0 = normal waveform generation mode
; -----000 ; 000 = disabled
; -----001 ; 001 = no prescaler, internal clock
; -----011 ; 011 = 1:64 prescaler, internal clock
; -----100 ; 100 = 1:256 prescaler, internal clock
; -----101 ; 101 = 1:1024 prescaler, internal clock
out TCCR0B, temp1
clr temp1 ; clear some registers
out TCNT0, temp1
out OCR0A, temp1
out OCR0B, temp1
; 8Mhz clock -> 125 ns instruction cycle
; 8 bit counter, 2^8 x 125 ns = 32 us
; with 1:256 prescaler: 256 x 32 us = 8.192 ms per rollover
; for 500 ms delay: 500 ms / 8.192 ms = 61.03 rollovers per 500 ms
; -- calculate error for 61 rollovers: 61 * 8.192 ms = 499.712 ms
; --- close enough for toggling a LED!!!!
.equ tim0_LEDrolls_target = 61
ldi tim0_LEDrolls, 0
; enable/disable timer/counter0 interrupts
ldi temp1, 0b00000001
; xxxxx--- ; reserved
; -----0-- ; 0 = timer/counter0 Output Compare B Match interrupt disabled
; ------0- ; 0 = timer/counter0 Output Compare A Match interrupt disabled
; -------0 ; 0 = timer/counter0 Overflow interrupt disabled
sts TIMSK0, temp1
; ************************************************************************
; configure timer/counter1 ; use OC1A to generate timed steps for test mode
ldi temp1, 0b00000000
; 00------ ; normal port operation, OC1A disconnected
; --00---- ; normal port operation, OC1B disconnected
; ----xx-- ; reserved
; ------00 ; 00 = clear timer on compare match with OCR1A
; ------00 ; 00 = clear timer on compare match with ICR1
; ------00 ; 00 = normal mode
sts TCCR1A, temp1
ldi temp1, 0b00001001
; 0------- ; 0 = input capture noise canceler disabled
; -0------ ; 0 = trigger capture on falling edge of IC1
; --x----- ; reserved
; ---00--- ; 00 = normal mode
; ---01--- ; 01 = clear timer on compare match with OCR1A
; ---11--- ; 11 = clear timer on compare match with ICR1
; -----001 ; 001 = no prescaler, internal clock
; -----011 ; 011 = 1:64 prescaler, internal clock
sts TCCR1B, temp1
ldi temp1, 0b00000000
; 0------- ; 1 = force output compare for channel A
; -0------ ; 1 = force output compare for channel B
; --xxxxxx ; reserved
sts TCCR1C, temp1
clr temp1 ; clear some registers
clr temp2
sts TCNT1H, temp1
sts TCNT1L, temp2
clr temp1 ; clear some registers
clr temp2
sts OCR1AH, temp1
sts OCR1AL, temp2
clr temp1 ; clear some registers
clr temp2
sts OCR1BH, temp1
sts OCR1BL, temp2
; enable/disable timer/counter1 interrupts
ldi temp1, 0b00000000
; --0----- ; 0 = input capture interrupt disabled
; xx-xx--- ; reserved
; -----0-- ; 0 = timer/counter2 Output Compare B Match interrupt disabled
; ------0- ; 0 = timer/counter2 Output Compare A Match interrupt disabled
; -------0 ; 0 = timer/counter2 Overflow interrupt disabled
sts TIMSK1, temp1
; ************************************************************************
; configure timer/counter2 ; we will use timer2 enable idle current reduction after 3 seconds of no step activity
ldi temp1, 0b00000000
; 00------ ; 00 = normal port operation, OC0A disconnected
; --00---- ; 00 = normal port operation, OC0B disconnected
; ----xx-- ; reserved
; ------00 ; 00 = normal waveform generation mode
sts TCCR2A, temp1
ldi temp1, 0b00000111
; 0------- ; 1 = force output compare for channel A
; -0------ ; 1 = force output compare for channel B
; --xx---- ; reserved
; ----0--- ; 0 = normal waveform generation mode
; -----000 ; 000 = disabled
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