stmd.asm

mega48 microsteeeper基于mega48 步进马达细分程序

; *************************************************************************
;
;    Filename: STMD.asm
;
;    Date: 09/18/05
;
;    Author: Aaron Garber 
;
;   Things to do:
;   --  Implement test mode to read pot for speed setting?
;
;   Fuses:  (checkmark only the following boxes)
;   -- Preserve EEPROM memory through Chip Erase Cycle [EESAVE=0]  ; fault codes are logged to EEPROM
;   -- Brown-out detection level at VCC=4.3 V; [BODLEVEL=100]
;   -- Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET:6CK/14CK + 65 ms; [CKSEL=0010 SUT=10]
;
; *************************************************************************
;
;   License: 
;   
;   This software can be used and modified for personal or non-commercial use only. 
;   
;   Please contact [e-mail] if you wish to use this code
;   for any commercial purpose.
;
;   Please contact [e-mail] with any bug fixes or functional improvements.
;                                                                       
;   Use this code at your own risk as there is no guarantee that it will work for you.
;
; *************************************************************************


; ***** Include Files ****************************************************
.include "m48def.inc"
.include "step_seq.asm"             ; stepping sequences
.include "mode_init.asm"


; ***** Defines **********************************************************
.def    fault_code = r0             ; value of fault code to be stored in EEPROM
.def    isr_SREG = r1               ; temporary storage of SREG in ISR's
;.def    = r2                       ; not used
;.def    = r3                       ; not used
;.def    = r4                       ; not used
;.def    = r5                       ; not used
;.def    = r6                       ; not used
;.def    = r7                       ; not used
;.def    = r8                       ; not used
;.def    = r9                       ; not used
;.def    = r10                      ; not used
;.def    = r11                      ; not used
;.def    = r12                      ; not used
;.def    = r13                      ; not used
;.def    = r14                      ; not used
.def    temp3 = r15                 ; temporary variable for general use
.def    temp1 = r16                 ; temporary variable for general use
.def    temp2 = r17                 ; temporary variable for general use
.def    max_entries = r18           ; number of byte entries in currently selected stepping sequence, zero based
.def    current_position = r19      ; current position in step sequence
.def    tim0_LEDrolls = r20         ; actual number of roll-overs for timer0, used to toggle LED on 500 ms tick
.def    tim2_idlerolls = r21        ; actual number of roll-overs for timer2, used to enable idle current reduction after 3 seconds of no step activity
.def    isr_temp1 = r22             ; temporary variable for ISR's
.def    isr_temp2 = r23             ; temporary variable for ISR's
.def    seq_start_L = r24           ; pointer to start of stepping sequence, low byte
.def    seq_start_H = r25           ; pointer to start of stepping sequence, high byte
;.def   XL = r26
;.def   XH = r27
;.def   YL = r28
;.def   YH = r29
;.def   ZL = r30
;.def   ZH = r31


; ***** Equates **********************************************************
.equ    brake_in = 3                ; PC3
.equ    test_in = 4                 ; PC4

.equ    step_in = 2                 ; PD2
.equ    dir_in = 3                  ; PD3
.equ    enable_in = 4               ; PD4
.equ    alive_LED = 5               ; PD5
.equ    brake_out = 6               ; PD6
.equ    idle_red_out = 7                ; PD7
;.equ    tim0_LEDrolls_target = ?   ; see timer0 setup
;.equ    tim2_idlerolls_target = ?  ; see timer2 setup


; ***** Variables in SRAM ************************************************
.dseg
;    var1:   .byte   1
;    var2:   .byte   2

; ***** Data in EEPROM ***************************************************
.eseg
    ee_const:   .db     0   ; normally point here to minimize chance of corruption
    ee_ptr:     .db     2   ; pointer to next empty location in EEPROM  

; ***** The Program ******************************************************
.cseg
.org 0x0000
    rjmp    rst         ; reset handler
    rjmp    ext_int0    ; IRQ0 handler
    rjmp    ext_int1    ; IRQ1 handler
    rjmp    pincint0    ; PCINT0 handler
    rjmp    pincint1    ; PCINT1 handler
    rjmp    pincint2    ; PCINT2 handler
    rjmp    WDT         ; Watchdog timer handler
    rjmp    tim2_compa  ; timer2 compare A handler
    rjmp    tim2_compb  ; timer2 compare B handler
    rjmp    tim2_ovf    ; timer2 overflow handler
    rjmp    tim1_capt   ; timer1 capture handler
    rjmp    tim1_compa  ; timer1 compare A handler
    rjmp    tim1_compb  ; timer1 compare B handler
    rjmp    tim1_ovf    ; timer1 overflow handler
    rjmp    tim0_compa  ; timer0 compare A handler
    rjmp    tim0_compb  ; timer0 compare B handler
    rjmp    tim0_ovf    ; timer0 overflow handler
    rjmp    spi_stc     ; SPI transfer complete handler
    rjmp    usart_rxc   ; USART, RX complete handler
    rjmp    usart_udre  ; USART, UDR empty handler
    rjmp    usart_txc   ; USART, TX complete handler
    rjmp    ADC_com     ; ADC conversion complete handler
    rjmp    ee_rdy      ; EEPROM ready handler
    rjmp    ana_comp    ; analog comparator handler
    rjmp    twi         ; 2-wire serial interface handler
    rjmp    spm_rdy     ; store program memory ready handler

; ************************************************************************
ext_int0:    ; IRQ0 handler
    in  isr_SREG, SREG          ; save status register

    sbi portd, idle_red_out     ; disable idle current reduction
    clr tim2_idlerolls          ; reset idle current reduction rollover counter
    ldi isr_temp1,  0b00000001  ; re-enable idle current reduction timer
                    ; xxxxx---  ; reserved
                    ; -----0--  ; 0 = timer/counter2 Output Compare B Match interrupt disabled
                    ; ------0-  ; 0 = timer/counter2 Output Compare A Match interrupt disabled
                    ; -------0  ; 0 = timer/counter2 Overflow interrupt disabled
    sts TIMSK2, isr_temp1
    
    mov ZL, seq_start_L         ; initialize ZL and ZH
    mov ZH, seq_start_H

    sbic pind, dir_in           ; check if direction pin is high...
    rjmp forward                ; ...yes, forward direction

reverse:
    clr isr_temp1
    dec current_position                ; decrement to next position...
    dec current_position                ; ...requires two decrements to make the word entries into byte equivalent address
    cp  max_entries, current_position   ; check if we are past the beginning of the sequence...
        brsh calc_Z                     ; ...no, then read data
    mov current_position, max_entries   ; ...yes, then point to last set of data entries
    rjmp calc_Z

forward:
    inc current_position                ; increment to next position...
    inc current_position                ; ...requires two increments to make the word entries into byte equivalent address
    cp  max_entries, current_position   ; check if we are we past the end of the sequence...
        brsh calc_Z                     ; ...no, then read data
    clr current_position                ; ...yes, then point back to beginning

calc_Z:                                 ; use the current_position to calculate the Z pointer to new sequence
    clr isr_temp1
    add zl, current_position            ; 16 bit addition to point to the new sequence
    adc zh, isr_temp1

read:                                   ; read the step sequence data 
    lpm isr_temp1, Z+                   ; read new data for dir pins, will be 0b000000xx where xx is the new data
    in  isr_temp2, portd                ; get a copy of portd to work with
    andi isr_temp2, 0b11111100          ; clear direction pins
    or  isr_temp1, isr_temp2            ; OR in the new data
    out portd, isr_temp1                ; update portb
        
    lpm isr_temp1, Z                    ; read new data for M pins
    out portb, isr_temp1                ; update portb
    
    out SREG, isr_SREG                  ; restore status register
    reti
; ************************************************************************
ext_int1:    ; IRQ1 handler
    ldi     temp1, 3   ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
pincint0:    ; PCINT0 handler
    ldi     temp1, 4   ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
pincint1:    ; PCINT1 handler
    ldi     temp1, 5   ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
pincint2:    ; PCINT2 handler
    ldi     temp1, 6        ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
WDT:         ; Watchdog timer handler
    ldi     temp1, 7   ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
tim2_compa:  ; timer2 compare A handler
    ldi     temp1, 8   ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
tim2_compb:  ; timer2 compare B handler
    ldi     temp1, 9   ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
tim2_ovf:    ; timer2 overflow handler
    in  isr_SREG, SREG      ; save status register
    inc tim2_idlerolls
    out SREG, isr_SREG      ; restore status register
    reti

; ************************************************************************
tim1_capt:   ; timer1 capture handler
    ldi     temp1, 11  ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
tim1_compa:  ; timer1 compare A handler
    rcall   ext_int0  ; simulate a step in test mode
    reti

; ************************************************************************
tim1_compb:  ; timer1 compare B handler
    ldi     temp1, 13  ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti
 
; ************************************************************************
tim1_ovf:    ; timer1 overflow handler
    ldi     temp1, 14  ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
tim0_compa:  ; timer0 compare A handler
    ldi     temp1, 15  ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
tim0_compb:  ; timer0 compare B handler
    ldi     temp1, 16  ; fault code
    mov     fault_code, temp1
    rjmp    fault_trap
    reti

; ************************************************************************
tim0_ovf:    ; timer0 overflow handler
    in  isr_SREG, SREG      ; save status register
    inc tim0_LEDrolls
    out SREG, isr_SREG      ; restore status register
    reti

; ************************************************************************