📄 t101_util.c
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/****************************************************************************
* File: T101_Util.c *
* Description: Define T10x chip control policy *
* History: 2005/08/12 *
* *
* Copyright 2005 (c) Terawins Inc. *
****************************************************************************/
/****************************************************************************
* Include File *
****************************************************************************/
#include <reg51.h>
//#include "math.h"
#include "common.h"
#include "SYSTEM.H"
#include "struct.h"
#include "twowire.h"
#include "OSDDRAW.H"
#include "T101_Util.h"
#include "TW10xReg.h"
#include "Gamma.h"
//#include "AU_7_A.c"
//#include "AU_7_D.c"
///----------------Analog panel----------------------//
#ifdef ANALOG_PANEL
#ifdef __AU_7_ANALOG__
#include "AU_7_A.c"
#elif (defined __PANASONIC_7_ANALOG__)
#include "PANASONIC_7_A.c"
#elif (defined __AU_5_6_ANALOG__)
#include "AU_5_6_A.c"
#elif (defined __PVI_7_ANALOG__)
#include "PVI_7_A.c"
#elif (defined __PVI_9_ANALOG__)
#include "PVI_9_A.c"
#elif (defined __LG_7_ANALOG__)
#include "LG_7_A.c"
#elif (defined __TOSHIBA_7_ANALOG__)
#include "TOSHIBA_7_A.c"
#elif (defined __PVI_10_ANALOG__)
#include "PVI_10_A.c"
#elif (defined __AU_3_5_ANALOG__)
#include "AU_3_5_A.c"
#elif (defined __CPT_9_ANALOG__)
#include "CPT_9_A.c"
#elif (defined __Sharp_7_ANALOG__)
#include "Sharp_7_A.c"
#elif (defined __TMD_5_8_ANALOG__)
#include "TMD_5_8_A.c"
#elif (defined __PVI_5_ANALOG__)
#include "PVI_5_A.c"
#elif (defined __SANYO_7_ANALOG__)
#include "SANYO_7_A.c"
#elif (defined __PVI_6_2_ANALOG__)
#include "PVI_6_2_A.c"
#elif (defined __CHILIN_10_2_ANALOG__)
#include "CHILIN_10_2_A.c"
#elif (defined __LG_6_5_ANALOG__)
#include "LG_6_5_A.c"
#elif (defined __PVI_3_5_ANALOG__)
#include "PVI_3_5_A.c"
#elif (defined __SAMSUNG_5_ANALOG__)
#include "SAMSUNG_5_A.c"
#elif (defined __TOPPOLY_2_5_ANALOG__)
#include "Toppoly_2_5_A.c"
#endif
#else //digital panel
///----------------Digital panel--------------------//
#ifdef __AU_7_DIGITAL__
#include "AU_7_D.c"
#elif (defined __HITACH_7_DIGITAL__)
#include "HITACH_7_D.c"
#elif (defined __HANSTAR_9_DIGITAL__)
#include "HANSTAR_9_D.c"
#elif (defined __INCH_10_2_DIGITAL__)
#include "INCH_10_2_D.c"
#elif (defined __SHARP_8_DIGITAL__)
#include "SHARP_8_D.c"
#elif (defined __TOSHIBA_7_7_DIGITAL__)
#include "TOSHIBA_7_7_D.c"
#elif (defined __TOSHIBA_12_DIGITAL__)
#include "TOSHIBA_12_D.c"
#elif (defined __AU_12_DIGITAL__)
#include "AU_12_D.c"
#elif (defined __INCH_17_DIGITAL__)
#include "INCH_17_D.c"
#elif (defined __CMV_10_2_DIGITAL__)
#include "CMV_10_2_D.c"
#elif (defined __CPT_7_DIGITAL__)
#include "CPT_7_D.c"
#elif (defined __CHILIN_10_2_DIGITAL__)
#include "CHILIN_10_2_D.c"
#elif (defined __TopSun_4_DIGITAL__)
#include "TopSun_4_D.c"
///---------Digital panel- Serial RGB type------------//
#elif (defined __CHILIN_2_4_SERIAL__)
#include "CHILIN_2_4_S.c"
#elif (defined __AU_2_5_SERIAL__)
#include "AU_2_5_S.c"
#endif
#endif //end of Panel Type(analog/digital)
extern uCHAR idata m_cStandard;
extern uCHAR idata m_cChroma;//NTSC // add by Sherman 06'01'13
extern uCHAR idata m_cScaleratio;
//extern uWORD m_wVRes; //as computed, used in output and scaling
//extern uWORD m_wHRes; //as computed, used in scaling
extern uWORD idata m_wBuff[3];
extern uCHAR idata m_cBuff[4];
extern uDWORD m_dwBuff[2];
//extern uWORD idata m_wVTotal;
extern uCHAR idata m_cSource;
extern uCHAR idata m_cModeStatus;
//extern uCHAR cSVideo;
extern bit auto_power;
extern void ClosePanel(uCHAR uR, uCHAR uG, uCHAR uB);
extern void OpenPanel(void);
uCHAR code ucaSignalStdRegP2[]={
0x0c, 0x18, 0x19, 0x1a, 0x1b, 0x82
};
uCHAR code ucaSignalStdValP2[]={
//NTSC
0x8a, 0x21, 0xf0, 0x7c, 0x0f, 0x42 ,
//PAL
0x67, 0x2a, 0x09, 0x8a, 0xcb, 0x52 ,
//SECAM
0x80, 0x28, 0xb3, 0x3b, 0xb2, 0x52 ,
//NTSC 4 // Add by Sherman 06'01'26
0x8a, 0x2a, 0x09, 0x8a, 0xcb, 0x42 ,
//PAL_M // Add by Sherman 06'01'26
0x67, 0x21, 0xe6, 0xef, 0xa3, 0x52 ,
//PAL_CN // Add by Sherman 06'01'26
0x67, 0x21, 0xf6, 0x94, 0x46, 0x52 ,
};
typedef enum{
itypeCVBS=0x00,
itypeSVIDEO,
itypeYPBPR
}Source_Type;
uWORD uiaSrcMux[]={
0x0000, itypeCVBS, // Reserved
0x0100, itypeCVBS, // CVBS1
0x0000, itypeCVBS, // CVBS2
0x0408, itypeSVIDEO,// Svideo0
};
/****************************************************************************
* T10x Register No. and values for System and Tcon initial *
****************************************************************************/
//====== InitT10x Register No. and values
REGADRVAL code stInitT10xP0[]={
//adr , value
///mark by chen 06'12'1
0x00 , 0x00,
0x01 , 0x00,
0x02 , 0x00,
0x0A , 0x60, // Change by Sherman for Gamma Adjustment 05'12'19
0x0B , 0x60, // Change by Sherman for Gamma Adjustment 05'12'19
0x0C , 0x00,
0x1a , 0x83,
0xCA , 0x02,// DODIV,//0x10|DODIV, // Change by Sherman 06'01'18
0xc2 , 0x0e,
//for image quality
0x60 , 0x01,
0x1c , 0xf0,
0x61 , 0x8F,
0x62 , 0x0F,
0x63 , 0x0F,
0x64 , 0x04,
0x66 , 0x88,
0x97 , 0x95, //CSC_YCOEF_REG
0x98 , 0xCC, //CSC_CrRCOEF_REG
0x0D , 0x20, //5 //ADC_GENCTRL_REG
0xE0 , 0x91, //PW_MGRCTRL_REG
0x11 , 0x00, //YPbPr_CLPCTRL_REG
//Source Select--S Video
0x18 , 0x01, //ASRC_MUX_REG
0x19 , 0x00, //YCbCr_SW_REG
//Enable CSC
0x91 , 0x07, //BTIN_PATTERN_REG
//DSP Clock
0xC8 , 0x3D,//DFDIV_40, //PLLDIV_F
0xC9 , 0x02,//DIDIV, //PLLDIV_I
//DSP Colck Polarity
0xC1 , 0x00, //POUT_CTRL3_REG
//H&V Main Display Pixel Clock Setted
0xDC , 0xD6,//(H_Size&0xFF),//H Size //HMDISP_SIZE_L_REG
0xDD , 0x00,//(H_Size>>8), //HMDISP_SIZE_H_REG
0xDE , 0xF0,//(V_Size&0xFF),//V Size //20 //VMDISP_SIZE_L_REG
0xDF , 0x00,//(V_Size>>8), //VMDISP_SIZE_H_REG
//H&V Display Pixel Clock Setted
///mark by chen 06'12'1
0xB0 , 0x27,//DISP_DFLT_HDENS, //H Start //DWHS_L_REG
0xB1 , 0x00,//(DISP_DFLT_HDENS>>8), //DWHS_H_REG
0xB2 , 0x12,//DISP_DFLT_VDENS, //V Start //DWVS_L_REG
0xB3 , 0x00,//(DISP_DFLT_VDENS>>8), //25 //DWVS_H_REG
0xB4 , 0xD5,//(H_Size&0xFF), //H Width //DWHSZ_L_REG
0xB5 , 0x00,//(H_Size>>8), //DWHSZ_H_REG
0xB6 , 0xF0,//(V_Size&0xFF), //DWVSZ_L_REG
0xB7 , 0x00,//(V_Size>>8), //DWVSZ_H_REG
0xB8 , 0x36,// DISP_DFLT_HTOTAL, //H Total //30 //PH_TOT_L_REG
0xB9 , 0x02,//(DISP_DFLT_HTOTAL>>8), //PH_TOT_H_REG
0xBA , 0x06,// DISP_DFLT_VTOTAL, //V Total //PV_TOT_L_REG
0xBB , 0x01,//(DISP_DFLT_VTOTAL>>8), //PV_TOT_H_REG
0xBC , 0x01,// DISP_DFLT_HSWIDTH, //HSYNC Width //PH_PW_L_REG
0xBD , 0x00,//(DISP_DFLT_HSWIDTH>>8), //35 //PH_PW_H_REG
0xBE , 0x01,// DISP_DFLT_VSWIDTH, //VSYNC Width //PV_PW_L_REG
0xBF , 0x00,//(DISP_DFLT_VSWIDTH>>8), //PV_PW_H_REG
//Scaling
0x72 , 0x00, //H Scale //SC_HOR_H1 33
0x73 , 0x64, //SC_HOR_H2 73
0x74 , 0x6b, //V Scale //40 //SC_VER_V1 00
0x75 , 0x1f, //SC_VER_V2 40
//LineBuffer Prefill
0xe2 , 0x11,
0x84 , 0x5c, //LINE_BUF_L_REG
0x85 , 0x1d, //LINE_BUF_H_REG
0xE1 , 0x01, //OPIN_CFG_REG
0x50 , 0x30, //45 //VSYNC_TIME_MEA_REG
0x38 , 0x50, //HSYNC_MISSCNT_L_REG
0x39 , 0x00, //HSYNC_MISSCNT_H_REG
0x3A , 0x20, //VSYNC_DLT_REG
0x3B , 0x03, //HSYNC_DLT_REG
0xE0 , 0x91,//(0x91 | CPH1 | CPH2 |CPH3), //PW_MGRCTRL_REG, Bruce, 2006/01/09 for flexibility
0xe1 , 0x01,
0x9C , 0x02, //DITHERING
0x90 , 0x04,//0x04, //IMG_FUNCTRL_REG
//De-Interlace enable
0x30 , 0x82,//(I1CReadByte(TW101, 0x30)|0x01)//DITLC_VSHDW_REG
0x90 , 0x04,//ENCSC,
0xea , 0x12,
0xff , 0x00// End of register settings, bruce, 2006/01/09
};
REGADRVAL code stInitT10xP2[]={
//adr , value
0x3f , 0x00, //ADC_ROFF // Change by Sherman 06'01'10
0x24 , 0xe9, //0 //0x24
0x25 , 0x0F, //0x25
//Video Register Page Setted
0x2E , 0x88, //HACT_START_REG
0x2F , 0x50, //HACT_WIDTH_REG
0x3F , 0x00, //SOFT_RESET_REG
0xc0 , 0x14, //5 //0xc0
0xe0 , 0x10, //0xe0
0x0C , 0x67, //CHROMA_AGC_REG
0x18 , 0x2a, //CHROMA_DTO0_REG
0x19 , 0x09, //CHROMA_DTO1_REG
0x1A , 0x8a, //10 //CHROMA_DTO2_REG
0x1B , 0xcb, //CHROMA_DTO3_REG
0x30 , 0x34, //VACT_START_REG
0x31 , 0xc1, //VACT_HEIGHT_REG
0x82 , 0x52, //COMB_FILTERCFG_REG
0x04 , 0xD8, // Change by Sherman for Gamma Adjustment 05'12'19
0x10 , 0x27,
0x02 , 0x4B,
0x11 , 0xFF,
//Color
0x01 , 0x09, //(I1CReadByte(TW101+4, 0x01)|0x01), //BW_CTRL_REG
0x08 , 0x80, // Change by Sherman for Gamma Adjustment 05'12'19
0x09 , 0x15,
0x80 , 0x2f,
0x2d , 0x48, // Add by Sherman 06'01'10s
0x3f , 0x00, //ADC_ROFF // Change by Sherman 06'01'10
/*
0X2E , 0X82,
0X2F , 0X50,
0X30 , 0X22,
0X31 , 0XC0,
*/
0xff , 0x00, // End of register settings, bruce, 2006/01/09
};
static uCHAR cSVideo=0;
static uCHAR cYPbPr=0; // add by Sherman 06'01'12
/****************************************************************************
* Public Global Variable *
****************************************************************************/
uDWORD m_dwTemp[2];
uWORD m_wDWHSZ=DWHSZ;
uCHAR NoSignal=0;
uCHAR SignalDefine=0x00|SS_NTSC|SS_PAL|SS_SECAM|SS_NTSC_4|SS_PAL_M|SS_PAL_CN;
#ifdef ROTATE
#if (defined T101A)|(defined T101)
uCHAR Dis_Mode=BOTTOM_RIGHT;
#else
uCHAR Dis_Mode=TOP_LEFT; /////图象翻转，只要修改Dis_Mode变量。
#endif
#endif
/****************************************************************************
* Public Function *
****************************************************************************/
void InitT10x(void)
{
uCHAR RegIndex,RegAdr;
RegIndex=0;
RegAdr=stInitT10xP0[0].ucRegAdr;
while (RegAdr != 0xFF) // bruce, 2006/01/09 /******初始化T112等相应的寄存器******/
{
if(RegAdr==0x30){
I2CWriteByte(TW101,RegAdr,(I2CReadByte(TW101,0x30)|0x01)); // enable Shadow
I2CWriteByte(TW101,RegAdr,(I2CReadByte(TW101,0x30)&(~0x02))|DEINTERLACE); //Bruce, 2006/01/10
}
else{
I2CWriteByte(TW101,RegAdr,stInitT10xP0[RegIndex].ucRegVal);
}
RegAdr=stInitT10xP0[++RegIndex].ucRegAdr;
}
RegIndex=0;
RegAdr=stInitT10xP2[0].ucRegAdr;
while (RegAdr != 0xFF) // bruce, 2006/01/09
{
if(RegAdr==0x01)
I2CWriteByte(TW101+4,RegAdr,(I2CReadByte(TW101+4,0x01)|0x01));// enable black level correction for 10 blank-to-black pedestal
else
I2CWriteByte(TW101+4,RegAdr,stInitT10xP2[RegIndex].ucRegVal);
RegAdr=stInitT10xP2[++RegIndex].ucRegAdr;
}
//=========================================================================
// Panel specified register settings
//=========================================================================
//#if (EMPTY_ARRAY)
for(RegIndex=0;RegIndex < PanelSpecP0Cnt;RegIndex++)
{
I2CWriteByte(TW101,ucaPanelSpecAdrP0[RegIndex],ucaPanelSpecDataP0[RegIndex]);
}
//#endif
for(RegIndex=0;RegIndex < PanelSpecP2Cnt;RegIndex++)
{
I2CWriteByte(TW101+4,ucaPanelSpecAdrP2[RegIndex],ucaPanelSpecDataP2[RegIndex]);
}
#ifdef ROTATE
SET_Dismod(); ///配置输出脚，扫描模式
#endif
}
void TconInit(void)
{
uCHAR TconIndex;
for(TconIndex=0;TconIndex < P1TconCnt;TconIndex++)
I2CWriteByte(TW101+2, TconAddress+TconIndex, TconP1Data[TconIndex]);
}
void SET_Dismod(void) //扫描模式（方向）
{
switch (Dis_Mode){
case TOP_LEFT: //Start from top-left
#ifdef ANALOG_PANEL
I2CWriteByte(TW101,0xE1, ScanMode[0]);
#else
UP_DOWN = DigiPanlScanMode[0]>>1;
LEFT_RIGHT = DigiPanlScanMode[0]&0x01;
I2CWriteByte(TW101,0xE1, ScanMode[0]&0xF0);
#endif
break;
case TOP_RIGHT: //Start from top-right
#ifdef ANALOG_PANEL
I2CWriteByte(TW101,0xE1, ScanMode[1]);
#else
UP_DOWN = DigiPanlScanMode[1]>>1;
LEFT_RIGHT = DigiPanlScanMode[1]&0x01;
I2CWriteByte(TW101,0xE1, ScanMode[1]&0xF0);
#endif
break;
case BOTTOM_RIGHT: //Start from bottom-right
#ifdef ANALOG_PANEL
I2CWriteByte(TW101,0xE1, ScanMode[2]);
#else
UP_DOWN = DigiPanlScanMode[2]>>1;
LEFT_RIGHT = DigiPanlScanMode[2]&0x01;
I2CWriteByte(TW101,0xE1, ScanMode[2]&0xF0);
#endif
break;
case BOTTOM_LEFT: //Start from bottom-left
#ifdef ANALOG_PANEL
I2CWriteByte(TW101,0xE1, ScanMode[3]);
#else
UP_DOWN = DigiPanlScanMode[3]>>1;
LEFT_RIGHT = DigiPanlScanMode[3]&0x01;
I2CWriteByte(TW101,0xE1, ScanMode[3]&0xF0);
#endif
break;
}
}
void SourceSelect(void)
{
I2CWriteByte(TW101, 0xC2, I2CReadByte(TW101, 0xC2)|(PSYNC_STR|IGNORE_VSYNC));
I2CWriteByte(TW101, 0x9d, 0x10); ///红色设度于画面颜色
I2CWriteByte(TW101, 0x9e, 0xff); ///绿色设度于画面颜色
I2CWriteByte(TW101, 0x9f, 0x40); ///蓝色设度于画面颜色
I2CWriteByte(TW101, PATTERN_CTRL, 0x87); ///PATTERN_CTRL=0x91;//内置字符发生器
I2CWriteByte(TW101,0x0f,0x70); //2005-03030 for position shift ///ADC POWER DOWN CONTROL
I2CWriteByte(TW101,0x0f,0x00); //2005-03030 for position shift ///ADC POWER UP CONTROL
I2CWriteByte(TW101,0x31,0x00); ///信号源选择 ;保留?
I2CWriteByte(TW101,0x1a, 0x87); ///chroam 频率增量
I2CWriteByte(TW101,0x18, uiaSrcMux[(m_cSource&0x0F)*2]>>8); // cMux1); ///选择视频路线
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