freq_occur_ad_to_pwm.lst

此程序是用CYPRESS单片机编写

(0158)    RAM_EPILOGUE RAM_USE_CLASS_1
(0159)    ret
    0318: 7F       RET   
(0160) 
(0161) .ENDSECTION
(0162) 
(0163) 
(0164) .SECTION
(0165) ;-----------------------------------------------------------------------------
(0166) ;  FUNCTION NAME: Timer8_Stop
(0167) ;
(0168) ;  DESCRIPTION:
(0169) ;     Disables timer operation by clearing the start bit in the Control
(0170) ;     register.
(0171) ;-----------------------------------------------------------------------------
(0172) ;
(0173) ;  ARGUMENTS:    None
(0174) ;  RETURNS:      Nothing
(0175) ;  SIDE EFFECTS: 
(0176) ;    The A and X registers may be modified by this or future implementations
(0177) ;    of this function.  The same is true for all RAM page pointer registers in
(0178) ;    the Large Memory Model.  When necessary, it is the calling function's
(0179) ;    responsibility to perserve their values across calls to fastcall16 
(0180) ;    functions.
(0181) ;
(0182)  Timer8_Stop:
(0183) _Timer8_Stop:
(0184)    RAM_PROLOGUE RAM_USE_CLASS_1
(0185)    Timer8_Stop_M
    0319: 41 23 FE AND   REG[35],254
(0186)    RAM_EPILOGUE RAM_USE_CLASS_1
(0187)    ret
    031C: 7F       RET   
(0188) 
(0189) .ENDSECTION
(0190) 
(0191) 
(0192) .SECTION
(0193) ;-----------------------------------------------------------------------------
(0194) ;  FUNCTION NAME: Timer8_WritePeriod
(0195) ;
(0196) ;  DESCRIPTION:
(0197) ;     Write the 8-bit period value into the Period register (DR1). If the
(0198) ;     Timer user module is stopped, then this value will also be latched
(0199) ;     into the Count register (DR0).
(0200) ;-----------------------------------------------------------------------------
(0201) ;
(0202) ;  ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A)
(0203) ;  RETURNS:   Nothing
(0204) ;  SIDE EFFECTS: 
(0205) ;    The A and X registers may be modified by this or future implementations
(0206) ;    of this function.  The same is true for all RAM page pointer registers in
(0207) ;    the Large Memory Model.  When necessary, it is the calling function's
(0208) ;    responsibility to perserve their values across calls to fastcall16 
(0209) ;    functions.
(0210) ;
(0211)  Timer8_WritePeriod:
(0212) _Timer8_WritePeriod:
(0213)    RAM_PROLOGUE RAM_USE_CLASS_1
(0214)    mov   reg[Timer8_PERIOD_REG], A
    031D: 60 21    MOV   REG[33],A
(0215)    RAM_EPILOGUE RAM_USE_CLASS_1
(0216)    ret
    031F: 7F       RET   
(0217) 
(0218) .ENDSECTION
(0219) 
(0220) 
(0221) .SECTION
(0222) ;-----------------------------------------------------------------------------
(0223) ;  FUNCTION NAME: Timer8_WriteCompareValue
(0224) ;
(0225) ;  DESCRIPTION:
(0226) ;     Writes compare value into the Compare register (DR2).
(0227) ;
(0228) ;     NOTE! The Timer user module must be STOPPED in order to write the
(0229) ;           Compare register. (Call Timer8_Stop to disable).
(0230) ;-----------------------------------------------------------------------------
(0231) ;
(0232) ;  ARGUMENTS:    fastcall16 BYTE bCompareValue (passed in A)
(0233) ;  RETURNS:      Nothing
(0234) ;  SIDE EFFECTS: 
(0235) ;    The A and X registers may be modified by this or future implementations
(0236) ;    of this function.  The same is true for all RAM page pointer registers in
(0237) ;    the Large Memory Model.  When necessary, it is the calling function's
(0238) ;    responsibility to perserve their values across calls to fastcall16 
(0239) ;    functions.
(0240) ;
(0241)  Timer8_WriteCompareValue:
(0242) _Timer8_WriteCompareValue:
(0243)    RAM_PROLOGUE RAM_USE_CLASS_1
(0244)    mov   reg[Timer8_COMPARE_REG], A
    0320: 60 22    MOV   REG[34],A
(0245)    RAM_EPILOGUE RAM_USE_CLASS_1
(0246)    ret
    0322: 7F       RET   
(0247) 
(0248) .ENDSECTION
(0249) 
(0250) 
(0251) .SECTION
(0252) ;-----------------------------------------------------------------------------
(0253) ;  FUNCTION NAME: Timer8_bReadCompareValue
(0254) ;
(0255) ;  DESCRIPTION:
(0256) ;     Reads the Compare register.
(0257) ;-----------------------------------------------------------------------------
(0258) ;
(0259) ;  ARGUMENTS:    None
(0260) ;  RETURNS:      fastcall16 BYTE bCompareValue (value of DR2 in the A register)
(0261) ;  SIDE EFFECTS: 
(0262) ;    The A and X registers may be modified by this or future implementations
(0263) ;    of this function.  The same is true for all RAM page pointer registers in
(0264) ;    the Large Memory Model.  When necessary, it is the calling function's
(0265) ;    responsibility to perserve their values across calls to fastcall16 
(0266) ;    functions.
(0267) ;
(0268)  Timer8_bReadCompareValue:
(0269) _Timer8_bReadCompareValue:
(0270)  bTimer8_ReadCompareValue:                       ; this name deprecated
(0271) _bTimer8_ReadCompareValue:                       ; this name deprecated
(0272)    RAM_PROLOGUE RAM_USE_CLASS_1
(0273)    mov   A, reg[Timer8_COMPARE_REG]
    0323: 5D 22    MOV   A,REG[34]
(0274)    RAM_EPILOGUE RAM_USE_CLASS_1
(0275)    ret
    0325: 7F       RET   
(0276) 
(0277) .ENDSECTION
(0278) 
(0279) 
(0280) .SECTION
(0281) ;-----------------------------------------------------------------------------
(0282) ;  FUNCTION NAME: Timer8_bReadTimerSaveCV
(0283) ;
(0284) ;  DESCRIPTION:
(0285) ;     Returns the value in the Count register (DR0), preserving the
(0286) ;     value in the compare register (DR2).
(0287) ;-----------------------------------------------------------------------------
(0288) ;
(0289) ;  ARGUMENTS: None
(0290) ;  RETURNS:   fastcall16 BYTE bCount (value of DR0 in the A register)
(0291) ;  SIDE EFFECTS:
(0292) ;     1) May cause an interrupt, if interrupt on Compare is enabled.
(0293) ;     2) If enabled, Global interrupts are momentarily disabled.
(0294) ;     3) The user module is stopped momentarily while the compare value is
(0295) ;        restored.  This may cause the Count register to miss one or more
(0296) ;        counts depending on the input clock speed.
(0297) ;     4) The A and X registers may be modified by this or future implementations
(0298) ;        of this function.  The same is true for all RAM page pointer registers in
(0299) ;        the Large Memory Model.  When necessary, it is the calling function's
(0300) ;        responsibility to perserve their values across calls to fastcall16 
(0301) ;        functions.
(0302) ;
(0303) ;  THEORY of OPERATION:
(0304) ;     1) Read and save the Compare register.
(0305) ;     2) Read the Count register, causing its data to be latched into
(0306) ;        the Compare register.
(0307) ;     3) Read and save the Counter value, now in the Compare register,
(0308) ;        to the buffer.
(0309) ;     4) Disable global interrupts
(0310) ;     5) Halt the timer
(0311) ;     6) Restore the Compare register values
(0312) ;     7) Start the Timer again
(0313) ;     8) Restore global interrupt state
(0314) ;
(0315)  Timer8_bReadTimerSaveCV:
(0316) _Timer8_bReadTimerSaveCV:
(0317)  bTimer8_ReadTimerSaveCV:                        ; this name deprecated
(0318) _bTimer8_ReadTimerSaveCV:                        ; this name deprecated
(0319)  bTimer8_ReadCounter:                            ; this name deprecated
(0320) _bTimer8_ReadCounter:                            ; this name deprecated
(0321) 
(0322) CpuFlags:      equ   0
(0323) bCount:        equ   1
(0324) 
(0325)    RAM_PROLOGUE RAM_USE_CLASS_2
(0326)    mov   X, SP                                   ; X <- stack frame pointer
    0326: 4F       MOV   X,SP
(0327)    add   SP, 2                                   ; Reserve space for flags, count
    0327: 38 02    ADD   SP,2
(0328)    mov   A, reg[Timer8_CONTROL_REG]              ; save the Control register
    0329: 5D 23    MOV   A,REG[35]
(0329)    push  A
    032B: 08       PUSH  A
(0330)    mov   A, reg[Timer8_COMPARE_REG]              ; save the Compare register
    032C: 5D 22    MOV   A,REG[34]
(0331)    push  A
    032E: 08       PUSH  A
(0332)    mov   A, reg[Timer8_COUNTER_REG]              ; synchronous copy DR2 <- DR0
    032F: 5D 20    MOV   A,REG[32]
(0333)                                                  ; This may cause an interrupt!
(0334)    mov   A, reg[Timer8_COMPARE_REG]              ; Now grab DR2 (DR0) and save
    0331: 5D 22    MOV   A,REG[34]
(0335)    mov   [X+bCount], A
    0333: 54 01    MOV   [X+1],A
(0336)    mov   A, 0                                    ; Guess the global interrupt state
    0335: 50 00    MOV   A,0
(0337)    tst   reg[CPU_SCR0], CPU_SCR0_GIE_MASK        ; Currently Disabled?
    0337: 49 FF 80 TST   REG[255],128
(0338)    jz    .SetupStatusFlag                        ;   Yes, guess was correct
    033A: A0 03    JZ    0x033E
(0339)    mov   A, FLAG_GLOBAL_IE                       ;    No, modify our guess
    033C: 50 01    MOV   A,1
(0340) .SetupStatusFlag:                                ; and ...
(0341)    mov   [X+CpuFlags], A                         ;   StackFrame[0] <- Flag Reg image
    033E: 54 00    MOV   [X+0],A
(0342)    M8C_DisableGInt                               ; Disable interrupts globally
    0340: 70 FE    AND   F,254
(0343)    Timer8_Stop_M                                 ; Stop the timer
    0342: 41 23 FE AND   REG[35],254
(0344)    pop   A                                       ; Restore the Compare register
    0345: 18       POP   A
(0345)    mov   reg[Timer8_COMPARE_REG], A
    0346: 60 22    MOV   REG[34],A
(0346)    pop   A                                       ; restore start state of the timer
    0348: 18       POP   A
(0347)    mov   reg[Timer8_CONTROL_REG], A
    0349: 60 23    MOV   REG[35],A
(0348)    pop   A                                       ; Return result stored in stack frame
    034B: 18       POP   A
(0349)    RAM_EPILOGUE RAM_USE_CLASS_2
(0350)    reti                                          ; Flag Reg <- StackFrame[0]
    034C: 7E       RETI  
(0351) 
(0352) .ENDSECTION
(0353) 
(0354) 
(0355) .SECTION
(0356) ;-----------------------------------------------------------------------------
(0357) ;  FUNCTION NAME: Timer8_bReadTimer
(0358) ;
(0359) ;  DESCRIPTION:
(0360) ;     Performs a software capture of the Count register.  A synchronous
(0361) ;     read of the Count register is performed.  The timer is NOT stopped.
(0362) ;
(0363) ;     WARNING - this will cause loss of data in the Compare register.
(0364) ;-----------------------------------------------------------------------------
(0365) ;
(0366) ;  ARGUMENTS:    None
(0367) ;  RETURNS:      fastcall16 BYTE bCount, (value of DR0 in the A register)
(0368) ;  SIDE EFFECTS:
(0369) ;    May cause an interrupt.
(0370) ;
(0371) ;    The A and X registers may be modified by this or future implementations
(0372) ;    of this function.  The same is true for all RAM page pointer registers in
(0373) ;    the Large Memory Model.  When necessary, it is the calling function's
(0374) ;    responsibility to perserve their values across calls to fastcall16 
(0375) ;    functions.
(0376) ;
(0377) ;  THEORY of OPERATION:
(0378) ;     1) Read the Count register - this causes the count value to be
(0379) ;        latched into the Compare register.
(0380) ;     2) Read and return the Count register values from the Compare
(0381) ;        registers into the return buffer.
(0382) ;
(0383)  Timer8_bReadTimer:
(0384) _Timer8_bReadTimer:
(0385)  bTimer8_ReadTimer:                              ; this name deprecated
(0386) _bTimer8_ReadTimer:                              ; this name deprecated
(0387)  bTimer8_CaptureCounter:                         ; this name deprecated
(0388) _bTimer8_CaptureCounter:                         ; this name deprecated
(0389) 
(0390)    RAM_PROLOGUE RAM_USE_CLASS_1
(0391)    mov   A, reg[Timer8_COUNTER_REG]              ; synchronous copy DR2 <- DR0
    034D: 5D 20    MOV   A,REG[32]
(0392)                                                  ; This may cause an interrupt!
(0393)    mov   A, reg[Timer8_COMPARE_REG]              ; Return DR2 (actually DR0)
    034F: 5D 22    MOV   A,REG[34]
(0394)    RAM_EPILOGUE RAM_USE_CLASS_1
(0395)    ret
    0351: 7F       RET   
FILE: lib\pwm16int.asm
(0001) ;;*****************************************************************************
(0002) ;;*****************************************************************************
(0003) ;;  FILENAME: PWM16INT.asm
(0004) ;;   Version: 2.4, Updated on 2005/09/30 at 11:09:49
(0005) ;;  Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
(0006) ;;
(0007) ;;  DESCRIPTION: PWM16 Interrupt Service Routine
(0008) ;;-----------------------------------------------------------------------------
(0009) ;;  Copyright (c) Cypress MicroSystems 2001-2003. All Rights Reserved.
(0010) ;;*****************************************************************************
(0011) ;;*****************************************************************************
(0012) 
(0013) include "m8c.inc"
(0014) include "PWM16.inc"
(0015) include "memory.inc"
(0016) 
(0017) 
(0018) ;-----------------------------------------------
(0019) ;  Global Symbols
(0020) ;-----------------------------------------------
(0021) export  _PWM16_ISR
(0022) 
(0023) 
(0024) AREA InterruptRAM (RAM,REL,CON)
(0025) 
(0026) ;@PSoC_UserCode_INIT@ (Do not change this line.)
(0027) ;---------------------------------------------------
(0028) ; Insert your custom declarations below this banner
(0029) ;---------------------------------------------------
(0030) 
(0031) ;------------------------
(0032) ; Includes
(0033) ;------------------------
(0034) 
(0035) 	
(0036) ;------------------------
(0037) ;  Constant Definitions
(0038) ;------------------------
(0039) 
(0040) 
(0041) ;------------------------
(0042) ; Variable Allocation
(0043) ;------------------------
(0044) 
(0045) 
(0046) ;---------------------------------------------------
(0047) ; Insert your custom declarations above this banner
(0048) ;---------------------------------------------------
(0049) ;@PSoC_UserCode_END@ (Do not change this line.)
(0050) 
(0051) 
(0052) AREA Us