adcinc14.inc

此程序是用CYPRESS单片机编写

;;*****************************************************************************
;;*****************************************************************************
;;  FILENAME:   ADCINC14.inc
;;  Version: 1.3, Updated on 2005/09/29 at 13:13:53
;;  Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
;;
;;  DESCRIPTION:  Assembler declarations for the UMName user module interface
;;                for the 22/24/27xxx PSoC family of devices.
;;-----------------------------------------------------------------------------
;;  Copyright (c) Cypress MicroSystems 2000-2003. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************


;--------------------------------------------------
; Constants for ADCINC14 API's.
;--------------------------------------------------
; Counter Constants
ADCINC14_bfCounter_Mask:               equ   10h
ADCINC14_bfCounter_INT_REG:            equ   0e1h

; PWM Constants
ADCINC14_bfPWM24_Mask:                 equ   80h
ADCINC14_bfPWM24_INT_REG:              equ   0e1h

; Power Settings
ADCINC14_bfPOWERMASK:                  equ   03h
ADCINC14_OFF:                          equ   00h
ADCINC14_LOWPOWER:                     equ   01h
ADCINC14_MEDPOWER:                     equ   02h
ADCINC14_HIGHPOWER:                    equ   03h

; Parameter Settings
ADCINC14_CALCTIME:                     equ   1h
ADCINC14_fCOMPARE_TRUE:                equ   08h      ; Bit to enable compare True interrupts

; Functionality constants
ADCINC14_fFSW0:                        equ   10h      ; Switch Cap FSW0 switch enable
ADCINC14_NoAZ:                         equ   01h      ; Set if AutoZero is no enabled
ADCINC14_fAutoZero:                    equ   20h      ; Switch Cap AutoZero switch enable
ADCINC14_fDBLK_ENABLE:                 equ   01h      ; Digital block enable bit
ADCINC14_fPULSE_WIDE:                  equ   04h      ; Use full clock width pulse.

; fStatus definitions
ADCINC14_fDATA_READY:                  equ   01h      ; This bit is set when data is available

; Data Format
ADCINC14_DATA_FORMAT:                  equ   0

;--------------------------------------------------
; Register Address Constants for ADCINC14
;--------------------------------------------------
; ADCINC14 PSoC Block register Definitions
; Integrator Block Register Definitions
ADCINC14_bfAtoDcr0: equ 84h
ADCINC14_bfAtoDcr1: equ 85h
ADCINC14_bfAtoDcr2: equ 86h
ADCINC14_bfAtoDcr3: equ 87h

; Counter Block Register Definitions
ADCINC14_fCounterFN:    equ 30h
ADCINC14_fCounterSL:    equ 31h
ADCINC14_fCounterOS:    equ 32h
ADCINC14_bCount:    equ 30h
ADCINC14_bPeriod:   equ 31h
ADCINC14_bCompare:  equ 32h
ADCINC14_bCounter_CR0:  equ 33h

; PWM24 Block Register Definitions
ADCINC14_bfPWM_LSB_FN:  equ 34h
ADCINC14_bfPWM_ISB_FN:  equ 38h
ADCINC14_bfPWM_MSB_FN:  equ 3ch
ADCINC14_fPWM_LSB_CR0:  equ 37h
ADCINC14_fPWM_ISB_CR0:  equ 3bh
ADCINC14_fPWM_MSB_CR0:  equ 3fh
ADCINC14_bPWM_Count_LSB:    equ 34h
ADCINC14_bPWM_Count_ISB:    equ 38h
ADCINC14_bPWM_Count_MSB:    equ 3ch
ADCINC14_bPWM_Period_LSB:   equ 35h
ADCINC14_bPWM_Period_ISB:   equ 39h
ADCINC14_bPWM_Period_MSB:   equ 3dh
ADCINC14_bPWM_IntTime_LSB:  equ 36h
ADCINC14_bPWM_IntTime_ISB:  equ 3ah
ADCINC14_bPWM_IntTime_MSB:  equ 3eh
ADCINC14_bfPWM_LSB_FN:  equ 34h
ADCINC14_bfPWM_ISB_FN:  equ 38h
ADCINC14_bfPWM_MSB_FN:  equ 3ch


; end of file ADCINC14.inc