os_cpu.h

实现Fujitsu-FFMC-16-V120 ucos系统移植

/*
*********************************************************************************************************
*                                               uC/OS-II
*                                         The Real-Time Kernel
*
*                         (c) Copyright 1992-1999, Jean J. Labrosse, Weston, FL
*                                          All Rights Reserved
*
*
*                                       Fujitsu F2MC-16LX Specific code
*
*                                   FFMC-16 Family Softune C Compiler V30L03.
*
* File         : OS_CPU.H
* By           : Andrey Mozzhevilov. Yekaterinburg. Russia. [e-mail], [e-mail]
*                                                           www.geocities.com/andy_moz
* Port Version : 1.00
* Date         : 07-December-2001
*
* Sub Version : 1.02
*
* Updated     : 10-Match-2002
* By          : Sergey Pinigin.
*
* Description : Rewrite OS_TASK_SW macro.
*               Now uses more efficient INTP instruction instead INT #0.
*
*********************************************************************************************************
*/

#ifndef OS_CPU_H
#define OS_CPU_H

/*
*********************************************************************************************************
*                                              DATA TYPES
*                                         (Compiler Specific)
*********************************************************************************************************
*/

#if __FASM__ != 1
typedef unsigned char  BOOLEAN;
typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
typedef unsigned int   INT16U;                   /* Unsigned 16 bit quantity                           */
typedef signed   int   INT16S;                   /* Signed   16 bit quantity                           */
typedef unsigned long  INT32U;                   /* Unsigned 32 bit quantity                           */
typedef signed   long  INT32S;                   /* Signed   32 bit quantity                           */
typedef float          FP32;                     /* Single precision floating point                    */
typedef double         FP64;                     /* Double precision floating point                    */

typedef unsigned int   OS_STK;                   /* Each stack entry is 16-bit wide                    */
#endif

#define BYTE           INT8S                     /* Define data types for backward compatibility ...   */
#define UBYTE          INT8U                     /* ... to uC/OS V1.xx.  Not actually needed for ...   */
#define WORD           INT16S                    /* ... uC/OS-II.                                      */
#define UWORD          INT16U
#define LONG           INT32S
#define ULONG          INT32U

/*
*********************************************************************************************************
*                                        Fujitsu F2MC-16LX
*
* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
*             will be enabled even if they were disabled before entering the critical section.
*
* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if
*             interrupts were disabled before entering the critical section, they will be disabled when
*             leaving the critical section.
*
* Method #12: As method #2, but disable/enable interrupts, using ILM bits in status register.
*             This is non-standard method for uCOS, but it may be helpful in some cases.
*             This method allows to have the analogue of nonmaskable interrupts (NMI).
*             For interrupts disable is used the instruction MOV ILM,#2, which leaves enabled interrups
*             with the high priorities 0 and 1. The Interrupts with these priorities can be used
*             as analogue of NMI.
*             Time of call to functions-handler of such interrupts is minimum.
*             The Handlers of these interrupts MUST NOT use some services OS and change
*             any variable OS since this can cause the crash of system.
*
*********************************************************************************************************
*/
#define  OS_CRITICAL_METHOD   12

#if      OS_CRITICAL_METHOD == 1
#define  OS_ENTER_CRITICAL()  __DI();                     /* Disable interrupts                        */
#define  OS_EXIT_CRITICAL()   __EI();                     /* Enable  interrupts                        */
#endif

#if      OS_CRITICAL_METHOD == 2
                                                          /* Disable interrupts                        */
#define  OS_ENTER_CRITICAL()\
{\
  __asm ("           PUSHW PS");\
  __DI();\
}
#define  OS_EXIT_CRITICAL()   __asm ("   POPW  PS");      /* Enable  interrupts                        */
#endif

#if      OS_CRITICAL_METHOD == 12
                                                          /* Disable interrupts                        */
#define  OS_ENTER_CRITICAL()\
{\
  __asm ("           PUSHW PS");\
  __asm ("           MOV ILM,#2");\
}
#define  OS_EXIT_CRITICAL()   __asm ("   POPW  PS");      /* Enable  interrupts                        */
#endif

/*
*********************************************************************************************************
*                           Fujitsu FFMC-16 Miscellaneous
*********************************************************************************************************
*/

#define  OS_ISR_PROTO_EXT     1

#define  OS_STK_GROWTH        1                    /* Stack grows from HIGH to LOW memory on FFMC-16   */

/* Old context switch macro */
/* #define  uCOS_SW_VECT         0                    /* Interrupt vector # used for context switch       */
/* #define  OS_TASK_SW() __asm("        INT     #0");                                                     */

/* New context switch macro, since V1.02. Sergey Pinigin */
#define  OS_TASK_SW() {              \
    __asm("     .GLOBAL _OSCtxSw");  \
    __asm("        INTP _OSCtxSw");  \
}


#define  C_ISR_ENTER()  OSIntNesting = DIRR = 1;   /* This macro must be used when entering in any     */
                                                   /* interrupt, using OS services before calling      */
                                                   /* the any OS service.                              */
                                                   /* DIRR is the FFMC16 "delayed interrupt" register  */

/*
*********************************************************************************************************
*                                            GLOBAL VARIABLES
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                              PROTOTYPES
*********************************************************************************************************
*/
#if __FASM__ != 1
__interrupt void OSTickISR (void);
__interrupt void iDIRR_ISR (void);
#endif

#endif /*#ifndef OS_CPU_H*/