smartsopc_board_cyclone_1c6.qsf

sopc开发板标准NIOSII模块

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		SmartSOPC_Board_Cyclone_1C6_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name LAST_QUARTUS_VERSION "5.0 SP1.04"
set_global_assignment -name BDF_FILE SmartSOPC_Board_Cyclone_1C6_top.bdf

# Pin & Location Assignments
# ==========================
set_global_assignment -name RESERVE_PIN "AS INPUT TRI-STATED"
set_location_assignment PIN_93 -to D[0]
set_location_assignment PIN_94 -to D[1]
set_location_assignment PIN_95 -to D[2]
set_location_assignment PIN_98 -to D[3]
set_location_assignment PIN_99 -to D[4]
set_location_assignment PIN_100 -to D[5]
set_location_assignment PIN_101 -to D[6]
set_location_assignment PIN_104 -to D[7]
set_location_assignment PIN_74 -to D[8]
set_location_assignment PIN_73 -to D[9]
set_location_assignment PIN_68 -to D[10]
set_location_assignment PIN_67 -to D[11]
set_location_assignment PIN_66 -to D[12]
set_location_assignment PIN_65 -to D[13]
set_location_assignment PIN_61 -to D[14]
set_location_assignment PIN_62 -to D[15]
set_location_assignment PIN_115 -to A[0]
set_location_assignment PIN_83 -to A[1]
set_location_assignment PIN_84 -to A[2]
set_location_assignment PIN_85 -to A[3]
set_location_assignment PIN_86 -to A[4]
set_location_assignment PIN_87 -to A[5]
set_location_assignment PIN_106 -to A[6]
set_location_assignment PIN_107 -to A[7]
set_location_assignment PIN_108 -to A[8]
set_location_assignment PIN_113 -to A[9]
set_location_assignment PIN_114 -to A[10]
set_location_assignment PIN_82 -to A[11]
set_location_assignment PIN_79 -to A[12]
set_location_assignment PIN_78 -to A[13]
set_location_assignment PIN_77 -to A[14]
set_location_assignment PIN_76 -to A[15]
set_location_assignment PIN_60 -to A[16]
set_location_assignment PIN_59 -to A[17]
set_location_assignment PIN_58 -to A[18]
set_location_assignment PIN_75 -to A[19]
set_location_assignment PIN_117 -to A[20]
set_location_assignment PIN_118 -to A[21]
set_location_assignment PIN_119 -to A[22]
set_location_assignment PIN_105 -to nWE
set_location_assignment PIN_56 -to nOE
set_location_assignment PIN_120 -to FLASH_nCS1
set_location_assignment PIN_116 -to FLASH_nCS2
set_location_assignment PIN_29 -to FLASH_RnB
set_location_assignment PIN_28 -to SYS_CLK0
set_location_assignment PIN_153 -to SYS_CLK1
set_location_assignment PIN_152 -to SYS_nRST

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name TOP_LEVEL_ENTITY SmartSOPC_Board_Cyclone_1C6_top
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C6Q240C8
set_global_assignment -name STRATIX_CONFIGURATION_SCHEME "FAST PASSIVE PARALLEL"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name OPTIMIZE_FAST_CORNER_TIMING OFF
set_global_assignment -name FITTER_EFFORT "AUTO FIT"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"