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📄 smartsopc_board_cyclone_1c6.fit.rpt

📁 sopc开发板标准NIOSII模块
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; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle                     ; Duplicated      ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_11 ; REGOUT           ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle                     ; Duplicated      ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_12 ; REGOUT           ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle                     ; Duplicated      ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_13 ; REGOUT           ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle                     ; Duplicated      ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_14 ; REGOUT           ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle                     ; Duplicated      ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_15 ; REGOUT           ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_readn                ; Packed Register ; Register Packing ; Fast Output Register assignment        ; REGOUT    ; nOE                                                                                                                                               ; DATAIN           ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_writen               ; Packed Register ; Register Packing ; Fast Output Register assignment        ; REGOUT    ; nWE                                                                                                                                               ; DATAIN           ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_1        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[14]                                                                                                                                             ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_2        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[13]                                                                                                                                             ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_3        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[12]                                                                                                                                             ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_4        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[11]                                                                                                                                             ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_5        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[10]                                                                                                                                             ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_6        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[9]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_7        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[8]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_8        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[7]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_9        ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[6]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_10       ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[5]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_11       ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[4]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_12       ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[3]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_13       ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[2]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_14       ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[1]                                                                                                                                              ; OE               ;
; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_15       ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT    ; D[0]                                                                                                                                              ; OE               ;
+---------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+------------------+----------------------------------------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+------------------+


+------------------+
; Fitter Equations ;
+------------------+
The equations can be found in C:/altera/kits/nios2/components/SmartSOPC_Board_Cyclone_1C6/system/SmartSOPC_Board_Cyclone_1C6.fit.eqn.


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in C:/altera/kits/nios2/components/SmartSOPC_Board_Cyclone_1C6/system/SmartSOPC_Board_Cyclone_1C6.pin.


+-------------------------------------------------------------------------------------------+
; Fitter Resource Usage Summary                                                             ;
+---------------------------------------------+---------------------------------------------+
; Resource                                    ; Usage                                       ;
+---------------------------------------------+---------------------------------------------+
; Total logic elements                        ; 3,223 / 5,980 ( 53 % )                      ;
;     -- Combinational with no register       ; 1174                                        ;
;     -- Register only                        ; 608                                         ;
;     -- Combinational with a register        ; 1441                                        ;
;                                             ;                                             ;
; Logic element usage by number of LUT inputs ;                                             ;
;     -- 4 input functions                    ; 1504                                        ;
;     -- 3 input functions                    ; 907                                         ;
;     -- 2 input functions                    ; 175                                         ;
;     -- 1 input functions                    ; 315                                         ;
;     -- 0 input functions                    ; 322                                         ;
;                                             ;                                             ;
; Logic elements by mode                      ;                                             ;
;     -- normal mode                          ; 3023                                        ;
;     -- arithmetic mode                      ; 200                                         ;
;     -- qfbk mode                            ; 651                                         ;
;     -- register cascade mode                ; 0                                           ;
;     -- synchronous clear/load mode          ; 1170                                        ;
;     -- asynchronous clear/load mode         ; 969                                         ;
;                                             ;                                             ;
; Total LABs                                  ; 451 / 598 ( 75 % )                          ;
; Logic elements in carry chains              ; 216                                         ;
; User inserted logic elements                ; 0                                           ;
; Virtual pins                                ; 0                                           ;
; I/O pins                                    ; 43 / 185 ( 23 % )                           ;

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