assignment_defaults.qdf

sopc开发板标准NIOSII模块

# Default value changes
#
# In 5.0, the default value of assignment SIMULATION_WITH_GLITCH_FILTERING has changed to "On"
# In 5.0, the default value of assignment SMART_RECOMPILE has changed to "Off"
# In 4.2, the default value of assignment DO_MIN_ANALYSIS has changed to "OFF"
# In 4.1, the default value of assignment FITTER_EFFORT has changed to "Auto Fit"


set_global_assignment -name NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT 10
set_global_assignment -name NUMBER_OF_DESTINATION_TO_REPORT 10
set_global_assignment -name NUMBER_OF_PATHS_TO_REPORT 200
set_global_assignment -name DO_MIN_ANALYSIS OFF
set_global_assignment -name DO_MIN_TIMING OFF
set_global_assignment -name REPORT_IO_PATHS_SEPARATELY OFF
set_global_assignment -name CLOCK_ANALYSIS_ONLY OFF
set_global_assignment -name FLOW_ENABLE_TIMING_CONSTRAINT_CHECK OFF
set_global_assignment -name DEFAULT_HOLD_MULTICYCLE "SAME AS MULTICYCLE"
set_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS ON
set_global_assignment -name CUT_OFF_READ_DURING_WRITE_PATHS ON
set_global_assignment -name CUT_OFF_CLEAR_AND_PRESET_PATHS ON
set_global_assignment -name CUT_OFF_IO_PIN_FEEDBACK ON
set_global_assignment -name DO_COMBINED_ANALYSIS OFF
set_global_assignment -name IGNORE_CLOCK_SETTINGS OFF
set_global_assignment -name ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS OFF
set_global_assignment -name DO_MINMAX_ANALYSIS_USING_RISEFALL_DELAYS OFF
set_global_assignment -name ENABLE_RECOVERY_REMOVAL_ANALYSIS OFF
set_global_assignment -name ENABLE_CLOCK_LATENCY OFF
set_global_assignment -name PROCESSOR ARM922T
set_global_assignment -name BYTE_ORDER "LITTLE ENDIAN"
set_global_assignment -name TOOLSET "CUSTOM BUILD"
set_global_assignment -name OUTPUT_TYPE "INTEL HEX"
set_global_assignment -name PROGRAMMING_FILE_TYPE "NO PROGRAMMING FILE"
set_global_assignment -name DO_POST_BUILD_COMMAND_LINE OFF
set_global_assignment -name USE_C_PREPROCESSOR_FOR_GNU_ASM_FILES ON
set_global_assignment -name ARM_CPP_COMMAND_LINE "-O2"
set_global_assignment -name GNUPRO_NIOS_CPP_COMMAND_LINE "-O3"
set_global_assignment -name GNUPRO_ARM_CPP_COMMAND_LINE "-O3 -fomit-frame-pointer"
set_global_assignment -name START_TIME 0ns
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name AUTO_USE_SIMULATION_PDB_NETLIST OFF
set_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS ON
set_global_assignment -name SETUP_HOLD_DETECTION OFF
set_global_assignment -name CHECK_OUTPUTS OFF
set_global_assignment -name SIMULATION_COVERAGE ON
set_global_assignment -name GLITCH_DETECTION OFF
set_global_assignment -name GLITCH_INTERVAL 1ns
set_global_assignment -name SIM_NO_DELAYS OFF
set_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE OFF
set_global_assignment -name SIMULATION_WITH_GLITCH_FILTERING ON
set_global_assignment -name HUB_ENTITY_NAME sld_hub
set_global_assignment -name HUB_INSTANCE_NAME sld_hub_inst
set_global_assignment -name AUTO_INSERT_SLD_HUB_ENTITY ENABLE
set_global_assignment -name SIGNALPROBE_ALLOW_OVERUSE OFF
set_global_assignment -name SIGNALPROBE_DURING_NORMAL_COMPILATION OFF
set_global_assignment -name PROJECT_SHOW_ENTITY_NAME ON
set_global_assignment -name VER_COMPATIBLE_DB_DIR export_db
set_global_assignment -name AUTO_EXPORT_VER_COMPATIBLE_DB OFF
set_global_assignment -name SMART_RECOMPILE OFF
set_global_assignment -name FLOW_DISABLE_ASSEMBLER OFF
set_global_assignment -name FLOW_ENABLE_HCII_COMPARE OFF
set_global_assignment -name HCII_OUTPUT_DIR hc_output
set_global_assignment -name SAVE_MIGRATION_INFO_DURING_COMPILATION OFF
set_global_assignment -name RUN_COMPARISON_ON_EVERY_COMPILE OFF
set_global_assignment -name ENABLE_ATTEMPT_SIMILAR_PLACEMENT OFF
set_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS OFF
set_global_assignment -name RUN_FULL_COMPILE_ON_DEVICE_CHANGE ON
set_global_assignment -name MERGE_HEX_FILE OFF
set_global_assignment -name GENERATE_SVF_FILE OFF
set_global_assignment -name GENERATE_ISC_FILE OFF
set_global_assignment -name GENERATE_JAM_FILE OFF
set_global_assignment -name GENERATE_JBC_FILE OFF
set_global_assignment -name GENERATE_JBC_FILE_COMPRESSED ON
set_global_assignment -name GENERATE_CONFIG_SVF_FILE OFF
set_global_assignment -name GENERATE_CONFIG_ISC_FILE OFF
set_global_assignment -name GENERATE_CONFIG_JAM_FILE OFF
set_global_assignment -name GENERATE_CONFIG_JBC_FILE OFF
set_global_assignment -name GENERATE_CONFIG_JBC_FILE_COMPRESSED ON
set_global_assignment -name GENERATE_CONFIG_HEXOUT_FILE OFF
set_global_assignment -name ISP_CLAMP_STATE_DEFAULT "TRI-STATE"
set_global_assignment -name POWER_DEFAULT_TOGGLE_RATE 12.5%
set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE 12.5%
set_global_assignment -name POWER_USE_PVA ON
set_global_assignment -name POWER_USE_INPUT_FILE "NO FILE"
set_global_assignment -name POWER_VCD_FILTER_GLITCHES ON
set_global_assignment -name POWER_REPORT_SIGNAL_ACTIVITY ON
set_global_assignment -name POWER_REPORT_POWER_DISSIPATION ON
set_global_assignment -name POWER_USE_DEVICE_CHARACTERISTICS TYPICAL
set_global_assignment -name POWER_USE_VOLTAGE NOMINAL
set_global_assignment -name POWER_AUTO_COMPUTE_TJ ON
set_global_assignment -name POWER_TJ_VALUE 25
set_global_assignment -name POWER_USE_TA_VALUE 25
set_global_assignment -name POWER_USE_CUSTOM_COOLING_SOLUTION OFF
set_global_assignment -name POWER_USE_TJ COMMERCIAL
set_global_assignment -name POWER_USE_COOLING_SOLUTION "NO COOLING SOLUTION"
set_global_assignment -name EDA_SIMULATION_TOOL "<None>"
set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "<None>"
set_global_assignment -name EDA_BOARD_DESIGN_TOOL "<None>"
set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "<None>"
set_global_assignment -name EDA_RESYNTHESIS_TOOL "<None>"
set_global_assignment -name HARDCOPY_EXTERNAL_CLOCK_JITTER "0.0 ns"
set_global_assignment -name HARDCOPY_INPUT_TRANSITION_CLOCK_PIN "0.1 ns"
set_global_assignment -name HARDCOPY_INPUT_TRANSITION_DATA_PIN "1.0 ns"
set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_TCL_FILE OFF
set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE "ALL EXCEPT COMBINATIONAL LOGIC ELEMENT OUTPUTS"
set_global_assignment -name MUX_RESTRUCTURE AUTO
set_global_assignment -name ENABLE_IP_DEBUG OFF
set_global_assignment -name SAVE_DISK_SPACE ON
set_global_assignment -name DISABLE_OCP_HW_EVAL OFF
set_global_assignment -name RECOMPILE_QUESTION YES
set_global_assignment -name DEVICE_FILTER_PACKAGE ANY
set_global_assignment -name DEVICE_FILTER_PIN_COUNT ANY
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE ANY
set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "<None>"
set_global_assignment -name VERILOG_INPUT_VERSION VERILOG_2001
set_global_assignment -name VHDL_INPUT_VERSION VHDL93
set_global_assignment -name COMPILATION_LEVEL FULL
set_global_assignment -name FAMILY Stratix
set_global_assignment -name TRUE_WYSIWYG_FLOW OFF
set_global_assignment -name SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES OFF
set_global_assignment -name STATE_MACHINE_PROCESSING AUTO
set_global_assignment -name EXTRACT_VERILOG_STATE_MACHINES ON
set_global_assignment -name EXTRACT_VHDL_STATE_MACHINES ON
set_global_assignment -name ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS ON
set_global_assignment -name DSP_BLOCK_BALANCING AUTO
set_global_assignment -name MAX_BALANCING_DSP_BLOCKS "-1"
set_global_assignment -name NOT_GATE_PUSH_BACK ON
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE ON
set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS OFF
set_global_assignment -name REMOVE_DUPLICATE_REGISTERS ON
set_global_assignment -name IGNORE_CARRY_BUFFERS OFF
set_global_assignment -name IGNORE_CASCADE_BUFFERS OFF
set_global_assignment -name IGNORE_GLOBAL_BUFFERS OFF
set_global_assignment -name IGNORE_ROW_GLOBAL_BUFFERS OFF
set_global_assignment -name IGNORE_LCELL_BUFFERS OFF
set_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS AUTO
set_global_assignment -name IGNORE_SOFT_BUFFERS ON
set_global_assignment -name MAX7000_IGNORE_SOFT_BUFFERS OFF
set_global_assignment -name LIMIT_AHDL_INTEGERS_TO_32_BITS OFF
set_global_assignment -name USE_LPM_FOR_AHDL_OPERATORS ON
set_global_assignment -name AUTO_GLOBAL_CLOCK_MAX ON
set_global_assignment -name AUTO_GLOBAL_OE_MAX ON
set_global_assignment -name MAX_AUTO_GLOBAL_REGISTER_CONTROLS ON
set_global_assignment -name AUTO_IMPLEMENT_IN_ROM OFF
set_global_assignment -name STRATIX_TECHNOLOGY_MAPPER LUT
set_global_assignment -name MAX7000_TECHNOLOGY_MAPPER "PRODUCT TERM"
set_global_assignment -name APEX20K_TECHNOLOGY_MAPPER LUT
set_global_assignment -name MERCURY_TECHNOLOGY_MAPPER LUT
set_global_assignment -name FLEX6K_TECHNOLOGY_MAPPER LUT
set_global_assignment -name FLEX10K_TECHNOLOGY_MAPPER LUT
set_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE BALANCED
set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE BALANCED
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED
set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE BALANCED
set_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE BALANCED
set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE BALANCED
set_global_assignment -name MERCURY_OPTIMIZATION_TECHNIQUE AREA
set_global_assignment -name FLEX6K_OPTIMIZATION_TECHNIQUE AREA
set_global_assignment -name FLEX10K_OPTIMIZATION_TECHNIQUE AREA
set_global_assignment -name ALLOW_XOR_GATE_USAGE ON
set_global_assignment -name AUTO_LCELL_INSERTION ON
set_global_assignment -name CARRY_CHAIN_LENGTH 48