📄 main.lst
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C51 COMPILER V7.50 MAIN 08/03/2006 09:32:50 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE MAIN
OBJECT MODULE PLACED IN Main.OBJ
COMPILER INVOKED BY: C:\Keil750\C51\BIN\c51.exe Main.c DB OE
line level source
1 //---------------------------------------------------------------------------
2 // Copyright (c) 2002 Jim Brady
3 // Do not use commercially without author's permission
4 // Last revised August 2002
5 // Net MAIN.C
6 //
7 // 8051 Web Server project
8 // See Makefile for build notes
9 // Written for Keil C51 V5.1 compiler, notes:
10 // It uses big endian order, which is the same as the
11 // network byte order, unlike x86 systems.
12 // Use OPTIMIZE(2)or higher so that automatic variables get shared
13 // between functions, to stay within the 256 bytes idata space
14 //---------------------------------------------------------------------------
15
16 #include <string.h>
17 //#include <stdlib.h>
18 #include "C8051f.h"
19 #include "net.h"
20 //#include "eth.h"
21 #include "cp220x_reg.h"
22 #include "timer.h"
23 #include "analog.h"
24 #include "arp.h"
25 #include "tcp.h"
26 #include "http.h"
27 #include "ip.h"
28 MACADDRESS xdata MYMAC;
29
30
31 // Global variables
32 UINT volatile event_word;
33 char xdata text[20];
34 UCHAR idata debug;
35 UCHAR idata rcve_buf_allocated;
36 #define LINK_ERROR 0x20
37 char xdata inbuf1[1500] _at_ 1000;
38 char xdata outbuf1[1500] _at_ 2500;
39
40 // This sets my hardware address to 00:01:02:03:04:05
41 UCHAR xdata my_hwaddr[6] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05};
42
43 // Hardware addr to send a broadcast
44 UCHAR code broadcast_hwaddr[6] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
45
46 // This sets my IP address to 192.168.0.10
47 ULONG code my_ipaddr = 0xC0A8000AL;
48
49 // This sets my subnet mask to 255.255.255.0
50 ULONG code my_subnet = 0xFFFFFF00L;
51
52 // Set to 0 if no gateway is present on network
53 ULONG code gateway_ipaddr = 0;
54
55 //--------------------------------------------------------------------------
C51 COMPILER V7.50 MAIN 08/03/2006 09:32:50 PAGE 2
56 // Initialize the memory management routines
57 // Initialize variables declared in main
58 //--------------------------------------------------------------------------
59
60 unsigned int Count1msInc;
61 unsigned char Count1ms,Count10ms,Count1s;
62 unsigned char TimeSecond,TimeMinute;
63 unsigned char PHY_Init(void);
64 void MAC_Init(void);
65 UCHAR xdata * rcve_frame(void);
66 void eth_rcve(UCHAR xdata * inbuf);
67 void MAC_Write(unsigned char mac_reg_offset, unsigned int mac_reg_data);
68 void MAC_SetAddress(MACADDRESS* pMAC);
69 void CP220x_Send( UCHAR xdata * outbuf, UINT len);
70
71 void init_main(void)
72 {
73 1 // Start the memory pool for incoming and outgoing Ethernet
74 1 // frames at 1000, with length = 1500 bytes. Memory below 500
75 1 // is used for program variables
76 1 // init_mempool((void xdata *)1000, 1500);
77 1 memset(text, 0, sizeof(text));
78 1 event_word = 0;
79 1 rcve_buf_allocated = FALSE;
80 1 debug = FALSE;
81 1 }
82
83 void PORT_Init (void)
84 {
85 1 P1MDOUT |= 0x40; // Set P1.6(TB_LED) to push-pull
86 1 P2MDOUT |= 0x08; // Set P2.2(AB4_LED1)
87 1 P74OUT = 0xFF;
88 1 P3MDOUT |= 0X40;
89 1 P4 = 0xC0; // /WR, /RD, are high, RESET is low
90 1 P5 = 0xFF;
91 1 P6 = 0xFF; // P5, P6 contain the address lines
92 1 P7 = 0xFF; // P7 contains the data lines
93 1
94 1 TCON &= ~0x01; // Make /INT0 level triggered
95 1
96 1 // Enable UART0, CP0, and /INT0. This puts /INT0 on P0.3.
97 1 XBR0 = 0x84;
98 1 XBR1 = 0x04;
99 1 XBR2 = 0x40;
100 1
101 1
102 1 TCON &= ~0x01; // Make /INT0 level triggered
103 1 EMI0CF = 0xFB; // Split-mode, non-multiplexed on P0 - P3
104 1
105 1 EMI0TC = 0xef; // This constant may be modified
106 1 // according to SYSCLK to meet the
107 1 // timing requirements for the CP2200
108 1
109 1 EMI0CN = 0x20; // Page of XRAM accessed by EMIF
110 1 // EX0 = 1;
111 1 }
112
113
114
115 void Timer0_Init (void)
116 {
117 1 CKCON|=0x8;
C51 COMPILER V7.50 MAIN 08/03/2006 09:32:50 PAGE 3
118 1 TMOD|=0x1; //16Bit
119 1 Count10ms=10;
120 1 Count1s=0;
121 1 TR0 = 0; // STOP Timer0
122 1 TH0 = (-SYSCLK/1000) >> 8; // set Timer0 to overflow in 1ms
123 1 TL0 = -SYSCLK/1000;
124 1 TR0 = 1; // START Timer0
125 1 IE|= 0x2;
126 1 }
127 void SYSCLK_Init (void)
128 {
129 1 int i; // delay counter
130 1
131 1 OSCXCN = 0x67; // start external oscillator with
132 1 // 22.1184MHz crystal
133 1
134 1 for (i=0; i < 256; i++) ; // wait for oscillator to start
135 1
136 1 while (!(OSCXCN & 0x80)) ; // Wait for crystal osc. to settle
137 1
138 1 OSCICN = 0x88; // select external oscillator as SYSCLK
139 1 // source and enable missing clock
140 1 // detector
141 1 }
142 void Timer0_ISR (void) interrupt 1 //1ms
143 {
144 1 TH0 = (-SYSCLK/1000) >> 8;
145 1 TL0 = -SYSCLK/1000;
146 1 if (Count1ms) Count1ms--;
147 1 Count1msInc++;
148 1 if (Count10ms) Count10ms--;
149 1 else
150 1 {
151 2 Count10ms=10; //10ms
152 2 if (Count1s) Count1s--;
153 2 else
154 2 {
155 3 Count1s=100; //1s
156 3 TimeSecond++;
157 3 if (TimeSecond>=60)
158 3 {
159 4 TimeSecond=0; //1min
160 4 TimeMinute++;
161 4 if (TimeMinute==60) TimeMinute=0;
162 4 }
163 3 }
164 2 }
165 1 }
166
167
168 void Delay1ms(unsigned char T)
169 {
170 1 Count1ms=T;
171 1 while (Count1ms);
172 1 }
173
174
175
176 void LightONOFF(bit b)
177 {
178 1
179 1 }
C51 COMPILER V7.50 MAIN 08/03/2006 09:32:50 PAGE 4
*** WARNING C280 IN LINE 176 OF MAIN.C: 'b': unreferenced local variable
180
181 void CP220x_RST_Low(void);
182 //加延时
183 void CP220x_RST_High(void);
184 void main (void)
185 {
186 1 UINT event_word_copy;
187 1 UCHAR xdata * inbuf;
188 1 unsigned char error_code;
189 1 unsigned int num_bytes;
190 1
191 1 WDTCN = 0xDE; // Disable watchdog timer
192 1 WDTCN = 0xAD;
193 1
194 1
195 1 SYSCLK_Init (); // initialize oscillator
196 1 Timer0_Init();
197 1 PORT_Init (); // initialize crossbar and GPIO
198 1
199 1 init_timer2();
200 1 init_main();
201 1 init_tcp();
202 1 init_http();
203 1 EA=1;
204 1 init_adc();
205 1 init_arp();
206 1 //init_8019();
207 1 CP220x_RST_Low();
208 1 //加延时
209 1 Delay1ms(50);
210 1 Delay1ms(50);
211 1 Delay1ms(50);
212 1 Delay1ms(50);
213 1 Delay1ms(50);
214 1 Delay1ms(200);
215 1 Delay1ms(200);
216 1 Delay1ms(200);
217 1 CP220x_RST_High();
218 1
219 1 Delay1ms(200);
220 1 Delay1ms(200);
221 1 Delay1ms(200);
222 1 Delay1ms(200);
223 1 Delay1ms(200);
224 1 Delay1ms(200);
225 1 Delay1ms(200);
226 1 Delay1ms(200);
227 1
228 1 INT0EN = 0x03;
229 1 INT1EN = 0x00;
230 1
231 1 // Clear all Interrupt Flags by reading the self-clearing status registers
232 1 // temp_char = INT0;
233 1 // temp_char = INT1;
234 1 error_code = PHY_Init();
235 1 Delay1ms(50);
236 1 Delay1ms(50);
237 1 MAC_Init();
238 1 Delay1ms(50);
239 1 Delay1ms(50);
240 1 Delay1ms(50);
C51 COMPILER V7.50 MAIN 08/03/2006 09:32:50 PAGE 5
241 1 Delay1ms(50);
242 1 ET2 = 1; // Enable timer 2 interrupt
243 1 RXCN = RXCLEAR;
244 1 EA = 1;
245 1
246 1 Delay1ms(50);
247 1 Delay1ms(50);
248 1 Delay1ms(50);
249 1 Delay1ms(50);
250 1 Delay1ms(50);
251 1 IP = 0x01;
252 1
253 1
254 1 // The code below is a priority based RTOS. The event
255 1 // handlers are in priority order - highest priority first.
256 1 while (1)
257 1 {
258 2 // Query CS8900A to see if Ethernet frame has arrived
259 2 // If so, set EVENT_ETH_ARRIVED bit in event_word
260 2 // query_8019();
261 2 if(CPINFOH & RXVALID)
262 2 event_word |= EVENT_ETH_ARRIVED;
263 2 // Use a copy of event word to avoid interference
264 2 // with interrupts
265 2 event_word_copy = event_word;
266 2 EA = 1;
267 2
268 2 // See if an Ethernet frame has arrived
269 2 if (event_word_copy & EVENT_ETH_ARRIVED)
270 2 {
271 3 EA = 0;
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