📄 main.#2
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//---------------------------------------------------------------------------
// Copyright (c) 2002 Jim Brady
// Do not use commercially without author's permission
// Last revised August 2002
// Net MAIN.C
//
// 8051 Web Server project
// See Makefile for build notes
// Written for Keil C51 V5.1 compiler, notes:
// It uses big endian order, which is the same as the
// network byte order, unlike x86 systems.
// Use OPTIMIZE(2)or higher so that automatic variables get shared
// between functions, to stay within the 256 bytes idata space
//---------------------------------------------------------------------------
#include <string.h>
//#include <stdlib.h>
#include "C8051f.h"
#include "net.h"
//#include "eth.h"
#include "cp220x_reg.h"
#include "timer.h"
#include "analog.h"
#include "arp.h"
#include "tcp.h"
#include "http.h"
#include "ip.h"
MACADDRESS xdata MYMAC;
// Global variables
UINT volatile event_word;
char xdata text[20];
UCHAR idata debug;
UCHAR idata rcve_buf_allocated;
#define LINK_ERROR 0x20
char xdata inbuf1[1500];
char xdata outbuf1[500];
// This sets my hardware address to 00:01:02:03:04:05
UCHAR xdata my_hwaddr[6] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05};
// Hardware addr to send a broadcast
UCHAR code broadcast_hwaddr[6] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
// This sets my IP address to 192.168.0.10
ULONG code my_ipaddr = 0xC0A8000AL;
// This sets my subnet mask to 255.255.255.0
ULONG code my_subnet = 0xFFFFFF00L;
// Set to 0 if no gateway is present on network
ULONG code gateway_ipaddr = 0;
//--------------------------------------------------------------------------
// Initialize the memory management routines
// Initialize variables declared in main
//--------------------------------------------------------------------------
unsigned int Count1msInc;
unsigned char Count1ms,Count10ms,Count1s;
unsigned char TimeSecond,TimeMinute;
unsigned char PHY_Init(void);
void MAC_Init(void);
UCHAR xdata * rcve_frame(void);
void eth_rcve(UCHAR xdata * inbuf);
void MAC_Write(unsigned char mac_reg_offset, unsigned int mac_reg_data);
void MAC_SetAddress(MACADDRESS* pMAC);
void CP220x_Send( UCHAR xdata * outbuf, UINT len);
void init_main(void)
{
// Start the memory pool for incoming and outgoing Ethernet
// frames at 1000, with length = 1500 bytes. Memory below 500
// is used for program variables
// init_mempool((void xdata *)1000, 1500);
memset(text, 0, sizeof(text));
event_word = 0;
rcve_buf_allocated = FALSE;
debug = FALSE;
}
void PORT_Init (void)
{
P1MDOUT |= 0x40; // Set P1.6(TB_LED) to push-pull P2MDOUT |= 0x08; // Set P2.2(AB4_LED1) P74OUT = 0xFF; P4 = 0xC0; // /WR, /RD, are high, RESET is low P5 = 0xFF; P6 = 0xFF; // P5, P6 contain the address lines P7 = 0xFF; // P7 contains the data lines TCON &= ~0x01; // Make /INT0 level triggered // Enable UART0, CP0, and /INT0. This puts /INT0 on P0.3. XBR0 = 0x84; XBR1 = 0x04; XBR2 = 0x40;
TCON &= ~0x01; // Make /INT0 level triggered
EMI0CF = 0xFB; // Split-mode, non-multiplexed on P0 - P3 EMI0TC = 0xef; // This constant may be modified // according to SYSCLK to meet the // timing requirements for the CP2200 EMI0CN = 0x20; // Page of XRAM accessed by EMIF
// EX0 = 1;
}
void Timer0_Init (void)
{
CKCON|=0x8;
TMOD|=0x1; //16Bit
Count10ms=10;
Count1s=0;
TR0 = 0; // STOP Timer0
TH0 = (-SYSCLK/1000) >> 8; // set Timer0 to overflow in 1ms
TL0 = -SYSCLK/1000;
TR0 = 1; // START Timer0
IE|= 0x2;
}
void SYSCLK_Init (void)
{
int i; // delay counter OSCXCN = 0x67; // start external oscillator with // 22.1184MHz crystal for (i=0; i < 256; i++) ; // wait for oscillator to start while (!(OSCXCN & 0x80)) ; // Wait for crystal osc. to settle OSCICN = 0x88; // select external oscillator as SYSCLK // source and enable missing clock // detector
}
void Timer0_ISR (void) interrupt 1 //1ms
{
TH0 = (-SYSCLK/1000) >> 8;
TL0 = -SYSCLK/1000;
if (Count1ms) Count1ms--;
Count1msInc++;
if (Count10ms) Count10ms--;
else
{
Count10ms=10; //10ms
if (Count1s) Count1s--;
else
{
Count1s=100; //1s
TimeSecond++;
if (TimeSecond>=60)
{
TimeSecond=0; //1min
TimeMinute++;
if (TimeMinute==60) TimeMinute=0;
}
}
}
}
void Delay1ms(unsigned char T)
{
Count1ms=T;
while (Count1ms);
}
void LightONOFF(bit b)
{
}
void CP220x_RST_Low(void);
//加延时
void CP220x_RST_High(void);
void main (void)
{
UINT event_word_copy;
UCHAR xdata * inbuf;
unsigned char error_code;
unsigned int num_bytes;
WDTCN = 0xDE; // Disable watchdog timer
WDTCN = 0xAD;
SYSCLK_Init (); // initialize oscillator
Timer0_Init();
PORT_Init (); // initialize crossbar and GPIO
init_timer2();
init_main();
init_tcp();
init_http();
EA=1;
init_adc();
init_arp();
//init_8019();
CP220x_RST_Low();
//加延时
Delay1ms(50);
Delay1ms(50);
Delay1ms(50);
Delay1ms(50);
Delay1ms(50);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
CP220x_RST_High();
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
INT0EN = 0x03;
INT1EN = 0x00;
// Clear all Interrupt Flags by reading the self-clearing status registers
// temp_char = INT0;
// temp_char = INT1;
error_code = PHY_Init();
Delay1ms(50);
Delay1ms(50);
MAC_Init();
Delay1ms(50);
Delay1ms(50);
Delay1ms(50);
Delay1ms(50);
ET2 = 1; // Enable timer 2 interrupt
RXCN = RXCLEAR;
EA = 1;
Delay1ms(50);
Delay1ms(50);
Delay1ms(50);
Delay1ms(50);
Delay1ms(50);
IP = 0x01;
// The code below is a priority based RTOS. The event
// handlers are in priority order - highest priority first.
while (1)
{
// Query CS8900A to see if Ethernet frame has arrived
// If so, set EVENT_ETH_ARRIVED bit in event_word
// query_8019();
if(CPINFOH & RXVALID)
event_word |= EVENT_ETH_ARRIVED;
// Use a copy of event word to avoid interference
// with interrupts
event_word_copy = event_word;
EA = 1;
// See if an Ethernet frame has arrived
if (event_word_copy & EVENT_ETH_ARRIVED)
{
EA = 0;
event_word &= (~EVENT_ETH_ARRIVED);
EA = 1;
// Allocate a buffer and read frame from CS8900A
// inbuf = (UCHAR xdata *)malloc(1000);
// num_bytes = CP220x_Receive(inbuf, sizeof(inbuf));
inbuf = rcve_frame();
if (inbuf != NULL)
{
// Process the received Ethernet frame
eth_rcve(inbuf);
// If the memory allocated for the rcve message has
// not already been freed then free it now
if (rcve_buf_allocated)
{
// free(inbuf);
rcve_buf_allocated = FALSE;
}
}
}
// See if TCP retransmit timer has expired
else if (event_word_copy & EVENT_TCP_RETRANSMIT)
{
event_word &= (~EVENT_TCP_RETRANSMIT);
EA = 1;
tcp_retransmit();
}
// See if TCP inactivity timer has expired
else if (event_word_copy & EVENT_TCP_INACTIVITY)
{
event_word &= (~EVENT_TCP_INACTIVITY);
EA = 1;
tcp_inactivity();
}
// See if ARP retransmit timer has expired
else if (event_word_copy & EVENT_ARP_RETRANSMIT)
{
event_word &= (~EVENT_ARP_RETRANSMIT);
EA = 1;
arp_retransmit();
}
// See if it is time to age the ARP cache
else if (event_word_copy & EVENT_AGE_ARP_CACHE)
{
event_word &= (~EVENT_AGE_ARP_CACHE);
EA = 1;
age_arp_cache();
}
// See if it is time to read the analog inputs
else if (event_word_copy & EVENT_READ_ANALOG)
{
event_word &= (~EVENT_READ_ANALOG);
EA = 1;
// Read one of the 3 analog inputs each time
read_analog_inputs();
}
// See if an RS232 message has arrived. It is
// not handled - RS232 is used for sending only
else if (event_word_copy & EVENT_RS232_ARRIVED)
{
event_word &= (~EVENT_RS232_ARRIVED);
EA = 1;
}
}
}
void CP220x_RST_Low(void)
{
P4 &= ~0x20; // Set P4.5 Low
}
void CP220x_RST_High(void)
{
P4 |= 0x20; // Set P4.5 High
}
unsigned char PHY_Init()
{
unsigned char temp_char;
unsigned char retval = 0;
//--------------------------------------------------------------------------
// Auto-Negotiation Synchronization (Section 15.2 of CP220x Datasheet)
//--------------------------------------------------------------------------
// Step 1: Disable the PHY
PHYCN = 0x00;
// Step 2: Enable the PHY with link integrity test and auto-negotiation
// turned off
// A. Disable the Transmitter Power Save Option and Configure Options
TXPWR = 0x80;
PHYCF = ( SMSQ | JABBER | ADPAUSE | AUTOPOL );
// B. Enable the Physical Layer
PHYCN = PHYEN;
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
// C. Wait for the physical layer to power up
// wait_ms(10);
// D. Enable the Transmitter and Receiver
PHYCN = ( PHYEN | TXEN | RXEN );
// Step 3: Poll the Wake-on-Lan Interrupt
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
Delay1ms(200);
// A. Clear Interrupt Flags
temp_char = INT1;
// B. Start a new timeout for 1.5 seconds
// reset_timeout(ONE_SECOND+ONE_SECOND/2);
// C. Check for a signal
// If no signal is deteced, wait 1.5s, then continue
// if(timeout_expired()){
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